reciever_8__body.blf

此RS232通信协议用VHDL语言实现

.names add_87/n26 i703/cin
1 1
.names pro2/rcnt<14> i703/dataa<0>
1 1
.names n1 i703/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i704 cin=-i704/cin dataa<0>=-i704/dataa<0> datab<0>=-i704/datab<0> result<0>=+n121 cout=+add_87/n24
.names add_87/n22 i704/cin
1 1
.names pro2/rcnt<12> i704/dataa<0>
1 1
.names n1 i704/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i705 cin=-i705/cin dataa<0>=-i705/dataa<0> datab<0>=-i705/datab<0> result<0>=+n123 cout=+add_87/n20
.names add_87/n18 i705/cin
1 1
.names pro2/rcnt<10> i705/dataa<0>
1 1
.names n1 i705/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i706 cin=-i706/cin dataa<0>=-i706/dataa<0> datab<0>=-i706/datab<0> result<0>=+n125 cout=+add_87/n16
.names add_87/n14 i706/cin
1 1
.names pro2/rcnt<8> i706/dataa<0>
1 1
.names n1 i706/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i707 cin=-i707/cin dataa<0>=-i707/dataa<0> datab<0>=-i707/datab<0> result<0>=+n127 cout=+add_87/n12
.names add_87/n10 i707/cin
1 1
.names pro2/rcnt<6> i707/dataa<0>
1 1
.names n1 i707/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i708 cin=-i708/cin dataa<0>=-i708/dataa<0> datab<0>=-i708/datab<0> result<0>=+n129 cout=+add_87/n8
.names add_87/n6 i708/cin
1 1
.names pro2/rcnt<4> i708/dataa<0>
1 1
.names n1 i708/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i709 cin=-i709/cin dataa<0>=-i709/dataa<0> datab<0>=-i709/datab<0> result<0>=+n131 cout=+add_87/n4
.names add_87/n2 i709/cin
1 1
.names pro2/rcnt<2> i709/dataa<0>
1 1
.names n1 i709/datab<0>
1 1
.names Decoder_76/n9 pro2/rcnt<2> n83
11 1
.names Decoder_76/n7 pro2/rcnt<2> n84
11 1
.names Decoder_76/n10 pro2/rcnt<2> n85
11 1
.names Decoder_76/n8 pro2/rcnt<2> n86
11 1
.names pro2/rcnt<0> pro2/rcnt<1> Decoder_76/n9
11 1
.names n99 pro2/rcnt<1> Decoder_76/n7
11 1
.names pro2/rcnt<1> Decoder_76/n2
0 1
.names reduce_nor_64/n15 reduce_nor_64/n30 reduce_nor_64/n31
1- 1
-1 1
.names reduce_nor_64/n25 reduce_nor_64/n28 reduce_nor_64/n29
1- 1
-1 1
.names pro2/rcnt<30> pro2/rcnt<31> reduce_nor_64/n27
1- 1
-1 1
.names reduce_nor_64/n23 reduce_nor_64/n24 reduce_nor_64/n25
1- 1
-1 1
.names pro2/rcnt<24> pro2/rcnt<25> reduce_nor_64/n23
1- 1
-1 1
.names reduce_nor_64/n19 reduce_nor_64/n20 reduce_nor_64/n21
1- 1
-1 1
.names pro2/rcnt<20> pro2/rcnt<21> reduce_nor_64/n19
1- 1
-1 1
.names pro2/rcnt<18> pro2/rcnt<19> reduce_nor_64/n17
1- 1
-1 1
.names reduce_nor_64/n7 reduce_nor_64/n14 reduce_nor_64/n15
1- 1
-1 1
.names pro2/rcnt<22> rxd_sync n22
11 1
.names state_r_sample n495
0 1
.names n84 n502
0 1
.names pro2/rcnt<14> pro2/rcnt<15> reduce_nor_64/n12
1- 1
-1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i710 cin=-i710/cin dataa<0>=-i710/dataa<0> datab<0>=-i710/datab<0> result<0>=+n106 cout=+add_87/n54
.names add_87/n52 i710/cin
1 1
.names pro2/rcnt<27> i710/dataa<0>
1 1
.names n1 i710/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i711 cin=-i711/cin dataa<0>=-i711/dataa<0> datab<0>=-i711/datab<0> result<0>=+n108 cout=+add_87/n50
.names add_87/n48 i711/cin
1 1
.names pro2/rcnt<25> i711/dataa<0>
1 1
.names n1 i711/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i712 cin=-i712/cin dataa<0>=-i712/dataa<0> datab<0>=-i712/datab<0> result<0>=+n110 cout=+add_87/n46
.names add_87/n44 i712/cin
1 1
.names pro2/rcnt<23> i712/dataa<0>
1 1
.names n1 i712/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i713 cin=-i713/cin dataa<0>=-i713/dataa<0> datab<0>=-i713/datab<0> result<0>=+n112 cout=+add_87/n42
.names add_87/n40 i713/cin
1 1
.names pro2/rcnt<21> i713/dataa<0>
1 1
.names n1 i713/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i714 cin=-i714/cin dataa<0>=-i714/dataa<0> datab<0>=-i714/datab<0> result<0>=+n114 cout=+add_87/n38
.names add_87/n36 i714/cin
1 1
.names pro2/rcnt<19> i714/dataa<0>
1 1
.names n1 i714/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i715 cin=-i715/cin dataa<0>=-i715/dataa<0> datab<0>=-i715/datab<0> result<0>=+n116 cout=+add_87/n34
.names add_87/n32 i715/cin
1 1
.names pro2/rcnt<17> i715/dataa<0>
1 1
.names n1 i715/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i716 cin=-i716/cin dataa<0>=-i716/dataa<0> datab<0>=-i716/datab<0> result<0>=+n118 cout=+add_87/n30
.names add_87/n28 i716/cin
1 1
.names pro2/rcnt<15> i716/dataa<0>
1 1
.names n1 i716/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i717 cin=-i717/cin dataa<0>=-i717/dataa<0> datab<0>=-i717/datab<0> result<0>=+n120 cout=+add_87/n26
.names add_87/n24 i717/cin
1 1
.names pro2/rcnt<13> i717/dataa<0>
1 1
.names n1 i717/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i718 cin=-i718/cin dataa<0>=-i718/dataa<0> datab<0>=-i718/datab<0> result<0>=+n122 cout=+add_87/n22
.names add_87/n20 i718/cin
1 1
.names pro2/rcnt<11> i718/dataa<0>
1 1
.names n1 i718/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i719 cin=-i719/cin dataa<0>=-i719/dataa<0> datab<0>=-i719/datab<0> result<0>=+n124 cout=+add_87/n18
.names add_87/n16 i719/cin
1 1
.names pro2/rcnt<9> i719/dataa<0>
1 1
.names n1 i719/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i720 cin=-i720/cin dataa<0>=-i720/dataa<0> datab<0>=-i720/datab<0> result<0>=+n126 cout=+add_87/n14
.names add_87/n12 i720/cin
1 1
.names pro2/rcnt<7> i720/dataa<0>
1 1
.names n1 i720/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i721 cin=-i721/cin dataa<0>=-i721/dataa<0> datab<0>=-i721/datab<0> result<0>=+n128 cout=+add_87/n10
.names add_87/n8 i721/cin
1 1
.names pro2/rcnt<5> i721/dataa<0>
1 1
.names n1 i721/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i722 cin=-i722/cin dataa<0>=-i722/dataa<0> datab<0>=-i722/datab<0> result<0>=+n130 cout=+add_87/n6
.names add_87/n4 i722/cin
1 1
.names pro2/rcnt<3> i722/dataa<0>
1 1
.names n1 i722/datab<0>
1 1
.names Decoder_76/n9 Decoder_76/n3 n87
11 1
.names Decoder_76/n7 Decoder_76/n3 n88
11 1
.names Decoder_76/n10 Decoder_76/n3 n89
11 1
.names Decoder_76/n8 Decoder_76/n3 n90
11 1
.names pro2/rcnt<0> Decoder_76/n2 Decoder_76/n10
11 1
.names n99 Decoder_76/n2 Decoder_76/n8
11 1
.names pro2/rcnt<2> Decoder_76/n3
0 1
.names reduce_nor_64/n31 n68
0 1
.names reduce_nor_64/n22 reduce_nor_64/n29 reduce_nor_64/n30
1- 1
-1 1
.names reduce_nor_64/n26 reduce_nor_64/n27 reduce_nor_64/n28
1- 1
-1 1
.names pro2/rcnt<28> pro2/rcnt<29> reduce_nor_64/n26
1- 1
-1 1
.names pro2/rcnt<26> pro2/rcnt<27> reduce_nor_64/n24
1- 1
-1 1
.names reduce_nor_64/n18 reduce_nor_64/n21 reduce_nor_64/n22
1- 1
-1 1
.names pro2/rcnt<22> pro2/rcnt<23> reduce_nor_64/n20
1- 1
-1 1
.names reduce_nor_64/n16 reduce_nor_64/n17 reduce_nor_64/n18
1- 1
-1 1
.names pro2/rcnt<16> pro2/rcnt<17> reduce_nor_64/n16
1- 1
-1 1
.names reduce_nor_64/n10 reduce_nor_64/n13 reduce_nor_64/n14
1- 1
-1 1
.names pro2/rcnt<28> rxd_sync n16
11 1
.names n85 n508
0 1
.names n86 n514
0 1
.names n87 n520
0 1
.names n88 n526
0 1
.names n89 n532
0 1
.names n90 n538
0 1
.names state_r_stop n544
0 1
.names pro2/rcnt<10> pro2/rcnt<11> reduce_nor_64/n9
1- 1
-1 1
.names n500 n501
0 1
.names n506 n507
0 1
.names n512 n513
0 1
.names n518 n519
0 1
.names n524 n525
0 1
.names n530 n531
0 1
.names n536 n537
0 1
.names n542 n543
0 1
.names reduce_nor_64/n4 reduce_nor_64/n5 reduce_nor_64/n6
1- 1
-1 1
.names reduce_nor_64/n1 reduce_nor_64/n2 reduce_nor_64/n3
1- 1
-1 1
.names pro2/rcnt<29> rxd_sync n15
11 1
.names LessThan_62/n2 pro2/count<1> pro2/count<1> LessThan_62/n4
11- 1
-01 1
.loc ../vhdl_packages/syn_unsi.vhd 118
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i723 cin=-i723/cin dataa<0>=-i723/dataa<0> datab<0>=-i723/datab<0> result<0>=+n50 cout=+n661
.names add_48/n4 i723/cin
1 1
.names pro2/count<3> i723/dataa<0>
1 1
.names n1 i723/datab<0>
1 1
.names reduce_nor_46/n1 reduce_nor_46/n2 n642
1- 1
-1 1
.loc reciever.vhd 84 state_r_start
.latch n144 state_r_start re bclkr 5 i598/reset
.names n6 i598/reset
0 1
.names pro2/rcnt<15> rxd_sync n29
11 1
.names n546 n547
0 1
.names reduce_nor_64/n3 reduce_nor_64/n6 reduce_nor_64/n7
1- 1
-1 1
.names pro2/rcnt<4> pro2/rcnt<5> reduce_nor_64/n4
1- 1
-1 1
.names LessThan_62/n6 pro2/count<3> pro2/count<3> n66
11- 1
-01 1
.names pro2/rcnt<26> rxd_sync n18
11 1
.names n642 n47
0 1
.names state_r_sample n532 n533
11 1
.loc reciever.vhd 84 state_r_center
.latch n146 state_r_center re bclkr 4 i384/reset
.names n6 i384/reset
0 1
.names state_r_stop reduce_or_100/n1 n145
1- 1
-1 1
.names pro2/rcnt<14> rxd_sync n30
11 1
.names pro2/rcnt<13> rxd_sync n31
11 1
.names pro2/rcnt<12> rxd_sync n32
11 1
.names pro2/rcnt<11> rxd_sync n33
11 1
.names pro2/rcnt<10> rxd_sync n34
11 1
.names pro2/rcnt<9> rxd_sync n35
11 1
.names pro2/rcnt<8> rxd_sync n36
11 1
.names pro2/rcnt<7> rxd_sync n37
11 1
.names pro2/rcnt<6> rxd_sync n38
11 1
.names pro2/rcnt<5> rxd_sync n39
11 1
.names pro2/rcnt<4> rxd_sync n40
11 1
.names pro2/rcnt<3> rxd_sync n41
11 1
.names pro2/rcnt<2> rxd_sync n42
11 1
.names pro2/rcnt<1> rxd_sync n43
11 1
.names pro2/rcnt<0> rxd_sync n44
11 1
.names n50 n642 n55
11 1
.names n51 n642 n56
11 1
.names n52 n642 n57
11 1
.names n48 n642 n58
11 1
.names n50 n654 n79
11 1
.names n51 n654 n80
11 1
.names n52 n654 n81
11 1
.names n48 n654 n82
11 1
.names pro2/count<0> n48 LessThan_62/n2
1- 1
-1 1