reciever_8__body.blf

此RS232通信协议用VHDL语言实现

11 1
.names n155 pro2/rcnt<15> Select_143/temp_select_1
11 1
.names state_r_sample n118 Select_143/temp_select_2
11 1
.names Select_143/temp_select_0 Select_143/temp_select_1 Select_143/temp_select_2 n188
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<19>
.latch n180 pro2/rcnt<19> re bclkr 2 resetr
.names state_r_start n30 Select_145/temp_select_0
11 1
.names n155 pro2/rcnt<14> Select_145/temp_select_1
11 1
.names state_r_sample n119 Select_145/temp_select_2
11 1
.names Select_145/temp_select_0 Select_145/temp_select_1 Select_145/temp_select_2 n190
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<20>
.latch n178 pro2/rcnt<20> re bclkr 2 resetr
.names state_r_start n31 Select_147/temp_select_0
11 1
.names n155 pro2/rcnt<13> Select_147/temp_select_1
11 1
.names state_r_sample n120 Select_147/temp_select_2
11 1
.names Select_147/temp_select_0 Select_147/temp_select_1 Select_147/temp_select_2 n192
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<21>
.latch n176 pro2/rcnt<21> re bclkr 2 resetr
.names state_r_start n32 Select_149/temp_select_0
11 1
.names n155 pro2/rcnt<12> Select_149/temp_select_1
11 1
.names state_r_sample n121 Select_149/temp_select_2
11 1
.names Select_149/temp_select_0 Select_149/temp_select_1 Select_149/temp_select_2 n194
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<22>
.latch n174 pro2/rcnt<22> re bclkr 2 resetr
.names state_r_start n33 Select_151/temp_select_0
11 1
.names n155 pro2/rcnt<11> Select_151/temp_select_1
11 1
.names state_r_sample n122 Select_151/temp_select_2
11 1
.names Select_151/temp_select_0 Select_151/temp_select_1 Select_151/temp_select_2 n196
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<23>
.latch n172 pro2/rcnt<23> re bclkr 2 resetr
.names state_r_start n34 Select_153/temp_select_0
11 1
.names n155 pro2/rcnt<10> Select_153/temp_select_1
11 1
.names state_r_sample n123 Select_153/temp_select_2
11 1
.names Select_153/temp_select_0 Select_153/temp_select_1 Select_153/temp_select_2 n198
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<24>
.latch n170 pro2/rcnt<24> re bclkr 2 resetr
.names state_r_start n35 Select_155/temp_select_0
11 1
.names n155 pro2/rcnt<9> Select_155/temp_select_1
11 1
.names state_r_sample n124 Select_155/temp_select_2
11 1
.names Select_155/temp_select_0 Select_155/temp_select_1 Select_155/temp_select_2 n200
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<25>
.latch n168 pro2/rcnt<25> re bclkr 2 resetr
.names state_r_start n36 Select_157/temp_select_0
11 1
.names n155 pro2/rcnt<8> Select_157/temp_select_1
11 1
.names state_r_sample n125 Select_157/temp_select_2
11 1
.names Select_157/temp_select_0 Select_157/temp_select_1 Select_157/temp_select_2 n202
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<26>
.latch n166 pro2/rcnt<26> re bclkr 2 resetr
.names state_r_start n37 Select_159/temp_select_0
11 1
.names n155 pro2/rcnt<7> Select_159/temp_select_1
11 1
.names state_r_sample n126 Select_159/temp_select_2
11 1
.names Select_159/temp_select_0 Select_159/temp_select_1 Select_159/temp_select_2 n204
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<27>
.latch n164 pro2/rcnt<27> re bclkr 2 resetr
.names state_r_start n38 Select_161/temp_select_0
11 1
.names n155 pro2/rcnt<6> Select_161/temp_select_1
11 1
.names state_r_sample n127 Select_161/temp_select_2
11 1
.names Select_161/temp_select_0 Select_161/temp_select_1 Select_161/temp_select_2 n206
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<28>
.latch n162 pro2/rcnt<28> re bclkr 2 resetr
.names state_r_start n39 Select_163/temp_select_0
11 1
.names n155 pro2/rcnt<5> Select_163/temp_select_1
11 1
.names state_r_sample n128 Select_163/temp_select_2
11 1
.names Select_163/temp_select_0 Select_163/temp_select_1 Select_163/temp_select_2 n208
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<29>
.latch n160 pro2/rcnt<29> re bclkr 2 resetr
.names state_r_start n40 Select_165/temp_select_0
11 1
.names n155 pro2/rcnt<4> Select_165/temp_select_1
11 1
.names state_r_sample n129 Select_165/temp_select_2
11 1
.names Select_165/temp_select_0 Select_165/temp_select_1 Select_165/temp_select_2 n210
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<30>
.latch n158 pro2/rcnt<30> re bclkr 2 resetr
.names state_r_start n41 Select_167/temp_select_0
11 1
.names n155 pro2/rcnt<3> Select_167/temp_select_1
11 1
.names state_r_sample n130 Select_167/temp_select_2
11 1
.names Select_167/temp_select_0 Select_167/temp_select_1 Select_167/temp_select_2 n212
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<31>
.latch n156 pro2/rcnt<31> re bclkr 2 resetr
.names state_r_start n42 Select_169/temp_select_0
11 1
.names n155 pro2/rcnt<2> Select_169/temp_select_1
11 1
.names state_r_sample n131 Select_169/temp_select_2
11 1
.names Select_169/temp_select_0 Select_169/temp_select_1 Select_169/temp_select_2 n214
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 r_ready
.latch n154 r_ready re bclkr 2 resetr
.names state_r_start n43 Select_171/temp_select_0
11 1
.names n155 pro2/rcnt<1> Select_171/temp_select_1
11 1
.names state_r_sample n132 Select_171/temp_select_2
11 1
.names Select_171/temp_select_0 Select_171/temp_select_1 Select_171/temp_select_2 n216
1-- 1
-1- 1
--1 1
.names pro2/rcnt<12> pro2/rcnt<13> reduce_nor_64/n11
1- 1
-1 1
.names state_r_start n44 Select_173/temp_select_0
11 1
.names n155 pro2/rcnt<0> Select_173/temp_select_1
11 1
.names state_r_sample n99 Select_173/temp_select_2
11 1
.names Select_173/temp_select_0 Select_173/temp_select_1 Select_173/temp_select_2 n218
1-- 1
-1- 1
--1 1
.names resetr n544 n545
11 1
.names n219 pro2/count<3> Select_175/temp_select_0
11 1
.names state_r_center n62 Select_175/temp_select_1
11 1
.names state_r_wait n79 Select_175/temp_select_2
11 1
.names Select_175/temp_select_0 Select_175/temp_select_1 Select_175/temp_select_2 n220
1-- 1
-1- 1
--1 1
.names n83 n496
0 1
.names n219 pro2/count<2> Select_177/temp_select_0
11 1
.names state_r_center n63 Select_177/temp_select_1
11 1
.names state_r_wait n80 Select_177/temp_select_2
11 1
.names Select_177/temp_select_0 Select_177/temp_select_1 Select_177/temp_select_2 n222
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<0>
.latch n218 pro2/rcnt<0> re bclkr 2 resetr
.names n219 pro2/count<1> Select_179/temp_select_0
11 1
.names state_r_center n64 Select_179/temp_select_1
11 1
.names state_r_wait n81 Select_179/temp_select_2
11 1
.names Select_179/temp_select_0 Select_179/temp_select_1 Select_179/temp_select_2 n224
1-- 1
-1- 1
--1 1
.loc reciever.vhd 84 pro2/rcnt<1>
.latch n216 pro2/rcnt<1> re bclkr 2 resetr
.names n219 pro2/count<0> Select_181/temp_select_0
11 1
.names state_r_center n65 Select_181/temp_select_1
11 1
.names state_r_wait n82 Select_181/temp_select_2
11 1
.names Select_181/temp_select_0 Select_181/temp_select_1 Select_181/temp_select_2 n226
1-- 1
-1- 1
--1 1
.names state_r_stop reduce_or_174/n1 n219
1- 1
-1 1
.names n498 resetr n499
11 1
.names state_r_stop reduce_or_110/n1 n155
1- 1
-1 1
.names n504 resetr n505
11 1
.names state_r_sample reduce_or_110/n1 n153
1- 1
-1 1
.names n510 resetr n511
11 1
.loc reciever.vhd 84 rbuf<0>
.latch pro2/rbufs<0> rbuf<0> re bclkr 2 n547
.names n516 resetr n517
11 1
.loc reciever.vhd 84 rbuf<1>
.latch pro2/rbufs<1> rbuf<1> re bclkr 2 n547
.names n522 resetr n523
11 1
.loc reciever.vhd 84 rbuf<2>
.latch pro2/rbufs<2> rbuf<2> re bclkr 2 n547
.names n528 resetr n529
11 1
.loc reciever.vhd 84 rbuf<3>
.latch pro2/rbufs<3> rbuf<3> re bclkr 2 n547
.names n534 resetr n535
11 1
.loc reciever.vhd 84 rbuf<4>
.latch pro2/rbufs<4> rbuf<4> re bclkr 2 n547
.names n540 resetr n541
11 1
.loc reciever.vhd 84 rbuf<5>
.latch pro2/rbufs<5> rbuf<5> re bclkr 2 n547
.names n545 n6 n546
1- 1
-1 1
.loc reciever.vhd 84 rbuf<6>
.latch pro2/rbufs<6> rbuf<6> re bclkr 2 n547
.names pro2/rcnt<8> pro2/rcnt<9> reduce_nor_64/n8
1- 1
-1 1
.loc reciever.vhd 84 rbuf<7>
.latch pro2/rbufs<7> rbuf<7> re bclkr 2 n547
.names pro2/rcnt<6> pro2/rcnt<7> reduce_nor_64/n5
1- 1
-1 1
.names state_r_sample n538 n539
11 1
.names pro2/rcnt<2> n67 reduce_nor_64/n2
1- 1
-1 1
.loc reciever.vhd 84 pro2/rbufs<0>
.latch rxd_sync pro2/rbufs<0> re bclkr 2 n543
.names LessThan_62/n4 pro2/count<2> pro2/count<2> LessThan_62/n6
11- 1
-01 1
.names n541 n6 n542
1- 1
-1 1
.names pro2/rcnt<25> rxd_sync n19
11 1
.names pro2/rcnt<21> rxd_sync n23
11 1
.loc ../vhdl_packages/syn_unsi.vhd 118
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i694 cin=-i694/cin dataa<0>=-i694/dataa<0> datab<0>=-i694/datab<0> result<0>=+n51 cout=+add_48/n4
.names add_48/n2 i694/cin
1 1
.names pro2/count<2> i694/dataa<0>
1 1
.names n1 i694/datab<0>
1 1
.loc reciever.vhd 84 pro2/rbufs<1>
.latch rxd_sync pro2/rbufs<1> re bclkr 2 n537
.names n46 pro2/count<3> reduce_nor_46/n2
1- 1
-1 1
.loc reciever.vhd 84 state_r_wait
.latch n148 state_r_wait re bclkr 4 i385/reset
.names n6 i385/reset
0 1
.loc reciever.vhd 84 state_r_sample
.latch n150 state_r_sample re bclkr 4 i386/reset
.names n6 i386/reset
0 1
.loc reciever.vhd 84 state_r_stop
.latch n152 state_r_stop re bclkr 4 i387/reset
.names n6 i387/reset
0 1
.loc reciever.vhd 84 pro2/count<3>
.latch n220 pro2/count<3> re bclkr 4 i388/reset
.names n6 i388/reset
0 1
.loc reciever.vhd 84 pro2/count<2>
.latch n222 pro2/count<2> re bclkr 4 i389/reset
.names n6 i389/reset
0 1
.loc reciever.vhd 84 pro2/count<1>
.latch n224 pro2/count<1> re bclkr 4 i390/reset
.names n6 i390/reset
0 1
.loc reciever.vhd 84 pro2/count<0>
.latch n226 pro2/count<0> re bclkr 4 i391/reset
.names n6 i391/reset
0 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i695 cin=-i695/cin dataa<0>=-i695/dataa<0> datab<0>=-i695/datab<0> result<0>=+n103 cout=+add_87/n60
.names add_87/n58 i695/cin
1 1
.names pro2/rcnt<30> i695/dataa<0>
1 1
.names n1 i695/datab<0>
1 1
.names reduce_nor_64/n11 reduce_nor_64/n12 reduce_nor_64/n13
1- 1
-1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i696 cin=-i696/cin dataa<0>=-i696/dataa<0> datab<0>=-i696/datab<0> result<0>=+n105 cout=+add_87/n56
.names add_87/n54 i696/cin
1 1
.names pro2/rcnt<28> i696/dataa<0>
1 1
.names n1 i696/datab<0>
1 1
.names reduce_nor_64/n8 reduce_nor_64/n9 reduce_nor_64/n10
1- 1
-1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i697 cin=-i697/cin dataa<0>=-i697/dataa<0> datab<0>=-i697/datab<0> result<0>=+n107 cout=+add_87/n52
.names add_87/n50 i697/cin
1 1
.names pro2/rcnt<26> i697/dataa<0>
1 1
.names n1 i697/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i698 cin=-i698/cin dataa<0>=-i698/dataa<0> datab<0>=-i698/datab<0> result<0>=+n109 cout=+add_87/n48
.names add_87/n46 i698/cin
1 1
.names pro2/rcnt<24> i698/dataa<0>
1 1
.names n1 i698/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i699 cin=-i699/cin dataa<0>=-i699/dataa<0> datab<0>=-i699/datab<0> result<0>=+n111 cout=+add_87/n44
.names add_87/n42 i699/cin
1 1
.names pro2/rcnt<22> i699/dataa<0>
1 1
.names n1 i699/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i700 cin=-i700/cin dataa<0>=-i700/dataa<0> datab<0>=-i700/datab<0> result<0>=+n113 cout=+add_87/n40
.names add_87/n38 i700/cin
1 1
.names pro2/rcnt<20> i700/dataa<0>
1 1
.names n1 i700/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i701 cin=-i701/cin dataa<0>=-i701/dataa<0> datab<0>=-i701/datab<0> result<0>=+n115 cout=+add_87/n36
.names add_87/n34 i701/cin
1 1
.names pro2/rcnt<18> i701/dataa<0>
1 1
.names n1 i701/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i702 cin=-i702/cin dataa<0>=-i702/dataa<0> datab<0>=-i702/datab<0> result<0>=+n117 cout=+add_87/n32
.names add_87/n30 i702/cin
1 1
.names pro2/rcnt<16> i702/dataa<0>
1 1
.names n1 i702/datab<0>
1 1
.loc reciever.vhd 76
.attrib lpm_direction 1 ADD
.attrib lpm_type 1 LPM_ADD_SUB
.attrib lpm_width 1 1
.subckt LPM_ADD_SUB i703 cin=-i703/cin dataa<0>=-i703/dataa<0> datab<0>=-i703/datab<0> result<0>=+n119 cout=+add_87/n28