dled.pnx

dp_xiliux 的 CPLD Verilog设计实验,7个LED演示.代码测试通过.

<?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE ibis [
<!ELEMENT ibis (part, pin+)>
<!ELEMENT part EMPTY>
<!ELEMENT pin EMPTY>
<!ATTLIST part
  arch   CDATA #REQUIRED
  device CDATA #REQUIRED
  spg    CDATA #REQUIRED
  pkg    CDATA #REQUIRED>
<!ATTLIST pin
  nm     CDATA #REQUIRED
  no     CDATA #REQUIRED
  iostd  (TTL|LVTTL|LVCMOS2|NA) "NA"
  sr     (SLOW|FAST|slow|fast) "SLOW">
]>
<ibis><part pkg="PC84" spg="-7" arch="xc9500" device="XC95108"/><pin nm="clock" no="9"/><pin nm="seg&lt;7&gt;" no="48" sr="fast"/><pin nm="seg&lt;4&gt;" no="45" sr="fast"/><pin nm="seg&lt;5&gt;" no="46" sr="fast"/><pin nm="seg&lt;3&gt;" no="44" sr="fast"/><pin nm="seg&lt;6&gt;" no="47" sr="fast"/><pin nm="sl&lt;0&gt;" no="50" sr="fast"/><pin nm="sl&lt;1&gt;" no="51" sr="fast"/><pin nm="seg&lt;0&gt;" no="40" sr="fast"/><pin nm="seg&lt;1&gt;" no="41" sr="fast"/><pin nm="sl&lt;2&gt;" no="52" sr="fast"/><pin nm="sl&lt;3&gt;" no="53" sr="fast"/><pin nm="seg&lt;2&gt;" no="43" sr="fast"/></ibis>