📄 sled.mfd

📁 dp_xiliux 的 CPLD Verilog设计实验,7个LED演示.代码测试通过.
💻 MFD
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上一页 12
INPUTS | 16 | count_0  | count_1  | count_10  | count_11  | count_12  | count_13  | count_14  | count_15  | count_2  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8  | count_9
INPUTMC | 16 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6
EQ | 6 | 
    count_16.T  =  count_0 * count_1 * count_10 * count_11 * 
	count_12 * count_13 * count_14 * count_15 * count_2 * 
	count_3 * count_4 * count_5 * count_6 * count_7 * 
	count_8 * count_9
    count_16.CLKF  =  clock	;FCLK/GCK
    count_16.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 4 | 15 | count_17
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 10 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 4 | 12 | 4 | 10 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6
INPUTS | 17 | count_0  | count_1  | count_10  | count_11  | count_12  | count_13  | count_14  | count_15  | count_2  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8  | count_9  | count_16.FBK.LFBK
INPUTMC | 17 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6 | 4 | 17
EQ | 6 | 
    count_17.T  =  count_0 * count_1 * count_10 * count_11 * 
	count_12 * count_13 * count_14 * count_15 * count_2 * 
	count_3 * count_4 * count_5 * count_6 * count_7 * 
	count_8 * count_9 * count_16.FBK.LFBK
    count_17.CLKF  =  clock	;FCLK/GCK
    count_17.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 4 | 12 | count_18
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 9 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 4 | 10 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6
INPUTS | 18 | count_0  | count_1  | count_10  | count_11  | count_12  | count_13  | count_14  | count_15  | count_17.FBK.LFBK  | count_2  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8  | count_9  | count_16.FBK.LFBK
INPUTMC | 18 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 15 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6 | 4 | 17
EQ | 6 | 
    count_18.T  =  count_0 * count_1 * count_10 * count_11 * 
	count_12 * count_13 * count_14 * count_15 * count_2 * 
	count_3 * count_4 * count_5 * count_6 * count_7 * 
	count_8 * count_9 * count_16.FBK.LFBK * count_17.FBK.LFBK
    count_18.CLKF  =  clock	;FCLK/GCK
    count_18.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 4 | 10 | count_19
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 8 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6
INPUTS | 19 | count_0  | count_1  | count_10  | count_11  | count_12  | count_13  | count_14  | count_15  | count_17.FBK.LFBK  | count_18.FBK.LFBK  | count_2  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8  | count_9  | count_16.FBK.LFBK
INPUTMC | 19 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 15 | 4 | 12 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6 | 4 | 17
EQ | 7 | 
    count_19.T  =  count_0 * count_1 * count_10 * count_11 * 
	count_12 * count_13 * count_14 * count_15 * count_2 * 
	count_3 * count_4 * count_5 * count_6 * count_7 * 
	count_8 * count_9 * count_16.FBK.LFBK * count_17.FBK.LFBK * 
	count_18.FBK.LFBK
    count_19.CLKF  =  clock	;FCLK/GCK
    count_19.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 0 | 15 | count_2
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 25 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 17 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6 | 5 | 6 | 5 | 9 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10
INPUTS | 2 | count_1.FBK.LFBK  | count_0.FBK.LFBK
INPUTMC | 2 | 0 | 16 | 0 | 17
EQ | 3 | 
    count_2.T  =  count_0.FBK.LFBK * count_1.FBK.LFBK
    count_2.CLKF  =  clock	;FCLK/GCK
    count_2.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 4 | 9 | count_20
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 7 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 4 | 8 | 4 | 7 | 4 | 6
INPUTS | 20 | count_0  | count_1  | count_10  | count_11  | count_12  | count_13  | count_14  | count_15  | count_17.FBK.LFBK  | count_18.FBK.LFBK  | count_19.FBK.LFBK  | count_2  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8  | count_9  | count_16.FBK.LFBK
INPUTMC | 20 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 15 | 4 | 12 | 4 | 10 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6 | 4 | 17
EQ | 7 | 
    count_20.T  =  count_0 * count_1 * count_10 * count_11 * 
	count_12 * count_13 * count_14 * count_15 * count_2 * 
	count_3 * count_4 * count_5 * count_6 * count_7 * 
	count_8 * count_9 * count_16.FBK.LFBK * count_17.FBK.LFBK * 
	count_18.FBK.LFBK * count_19.FBK.LFBK
    count_20.CLKF  =  clock	;FCLK/GCK
    count_20.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 4 | 8 | count_21
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 6 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 4 | 7 | 4 | 6
INPUTS | 21 | count_0  | count_1  | count_10  | count_11  | count_12  | count_13  | count_14  | count_15  | count_17.FBK.LFBK  | count_18.FBK.LFBK  | count_19.FBK.LFBK  | count_20.FBK.LFBK  | count_2  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8  | count_9  | count_16.FBK.LFBK
INPUTMC | 21 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6 | 4 | 17
EQ | 7 | 
    count_21.T  =  count_0 * count_1 * count_10 * count_11 * 
	count_12 * count_13 * count_14 * count_15 * count_2 * 
	count_3 * count_4 * count_5 * count_6 * count_7 * 
	count_8 * count_9 * count_16.FBK.LFBK * count_17.FBK.LFBK * 
	count_18.FBK.LFBK * count_19.FBK.LFBK * count_20.FBK.LFBK
    count_21.CLKF  =  clock	;FCLK/GCK
    count_21.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 4 | 7 | count_22
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 5 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 4 | 6
INPUTS | 22 | count_0  | count_1  | count_10  | count_11  | count_12  | count_13  | count_14  | count_15  | count_17.FBK.LFBK  | count_18.FBK.LFBK  | count_19.FBK.LFBK  | count_20.FBK.LFBK  | count_2  | count_21.FBK.LFBK  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8  | count_9  | count_16.FBK.LFBK
INPUTMC | 22 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 0 | 15 | 4 | 8 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6 | 4 | 17
EQ | 8 | 
    count_22.T  =  count_0 * count_1 * count_10 * count_11 * 
	count_12 * count_13 * count_14 * count_15 * count_2 * 
	count_3 * count_4 * count_5 * count_6 * count_7 * 
	count_8 * count_9 * count_16.FBK.LFBK * count_17.FBK.LFBK * 
	count_18.FBK.LFBK * count_19.FBK.LFBK * count_20.FBK.LFBK * 
	count_21.FBK.LFBK
    count_22.CLKF  =  clock	;FCLK/GCK
    count_22.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 4 | 6 | count_23
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 4 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2
INPUTS | 23 | count_0  | count_1  | count_10  | count_11  | count_12  | count_13  | count_14  | count_15  | count_17.FBK.LFBK  | count_18.FBK.LFBK  | count_19.FBK.LFBK  | count_20.FBK.LFBK  | count_2  | count_21.FBK.LFBK  | count_22.FBK.LFBK  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8  | count_9  | count_16.FBK.LFBK
INPUTMC | 23 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 0 | 15 | 4 | 8 | 4 | 7 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6 | 4 | 17
EQ | 8 | 
    count_23.T  =  count_0 * count_1 * count_10 * count_11 * 
	count_12 * count_13 * count_14 * count_15 * count_2 * 
	count_3 * count_4 * count_5 * count_6 * count_7 * 
	count_8 * count_9 * count_16.FBK.LFBK * count_17.FBK.LFBK * 
	count_18.FBK.LFBK * count_19.FBK.LFBK * count_20.FBK.LFBK * 
	count_21.FBK.LFBK * count_22.FBK.LFBK
    count_23.CLKF  =  clock	;FCLK/GCK
    count_23.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 0 | 14 | count_3
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 24 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 17 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6 | 5 | 6 | 5 | 9 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10
INPUTS | 3 | count_1.FBK.LFBK  | count_2.FBK.LFBK  | count_0.FBK.LFBK
INPUTMC | 3 | 0 | 16 | 0 | 15 | 0 | 17
EQ | 4 | 
    count_3.T  =  count_0.FBK.LFBK * count_1.FBK.LFBK * 
	count_2.FBK.LFBK
    count_3.CLKF  =  clock	;FCLK/GCK
    count_3.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 0 | 13 | count_4
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 23 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 17 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6 | 5 | 6 | 5 | 9 | 0 | 12 | 0 | 11 | 0 | 10
INPUTS | 4 | count_1.FBK.LFBK  | count_2.FBK.LFBK  | count_3.FBK.LFBK  | count_0.FBK.LFBK
INPUTMC | 4 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 17
EQ | 4 | 
    count_4.T  =  count_0.FBK.LFBK * count_1.FBK.LFBK * 
	count_2.FBK.LFBK * count_3.FBK.LFBK
    count_4.CLKF  =  clock	;FCLK/GCK
    count_4.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 0 | 12 | count_5
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 22 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 17 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6 | 5 | 6 | 5 | 9 | 0 | 11 | 0 | 10
INPUTS | 5 | count_1.FBK.LFBK  | count_2.FBK.LFBK  | count_3.FBK.LFBK  | count_4.FBK.LFBK  | count_0.FBK.LFBK
INPUTMC | 5 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 17
EQ | 4 | 
    count_5.T  =  count_0.FBK.LFBK * count_1.FBK.LFBK * 
	count_2.FBK.LFBK * count_3.FBK.LFBK * count_4.FBK.LFBK
    count_5.CLKF  =  clock	;FCLK/GCK
    count_5.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 0 | 11 | count_6
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 21 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 17 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6 | 5 | 6 | 5 | 9 | 0 | 10
INPUTS | 6 | count_1.FBK.LFBK  | count_2.FBK.LFBK  | count_3.FBK.LFBK  | count_4.FBK.LFBK  | count_5.FBK.LFBK  | count_0.FBK.LFBK
INPUTMC | 6 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 17
EQ | 5 | 
    count_6.T  =  count_0.FBK.LFBK * count_1.FBK.LFBK * 
	count_2.FBK.LFBK * count_3.FBK.LFBK * count_4.FBK.LFBK * 
	count_5.FBK.LFBK
    count_6.CLKF  =  clock	;FCLK/GCK
    count_6.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 0 | 10 | count_7
ATTRIBUTES | 4358912 | 0
OUTPUTMC | 20 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 17 | 4 | 15 | 4 | 12 | 4 | 10 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6 | 5 | 9 | 5 | 6
INPUTS | 7 | count_1.FBK.LFBK  | count_2.FBK.LFBK  | count_3.FBK.LFBK  | count_4.FBK.LFBK  | count_5.FBK.LFBK  | count_6.FBK.LFBK  | count_0.FBK.LFBK
INPUTMC | 7 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 17
EQ | 5 | 
    count_7.T  =  count_0.FBK.LFBK * count_1.FBK.LFBK * 
	count_2.FBK.LFBK * count_3.FBK.LFBK * count_4.FBK.LFBK * 
	count_5.FBK.LFBK * count_6.FBK.LFBK
    count_7.CLKF  =  clock	;FCLK/GCK
    count_7.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 5 | 9 | count_8
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 19 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 4 | 12 | 4 | 6 | 4 | 7 | 4 | 8 | 4 | 9 | 4 | 10 | 4 | 17 | 4 | 15 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 5 | 6
INPUTS | 8 | count_0  | count_1  | count_2  | count_3  | count_4  | count_5  | count_6  | count_7
INPUTMC | 8 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10
EQ | 4 | 
    count_8.T  =  count_0 * count_1 * count_2 * count_3 * 
	count_4 * count_5 * count_6 * count_7
    count_8.CLKF  =  clock	;FCLK/GCK
    count_8.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 5 | 6 | count_9
ATTRIBUTES | 4424448 | 0
OUTPUTMC | 18 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 4 | 6 | 4 | 7 | 4 | 8 | 4 | 9 | 4 | 10 | 4 | 12 | 4 | 17 | 4 | 15 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12
INPUTS | 9 | count_0  | count_1  | count_2  | count_3  | count_4  | count_5  | count_6  | count_7  | count_8.FBK.LFBK
INPUTMC | 9 | 0 | 17 | 0 | 16 | 0 | 15 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9
EQ | 4 | 
    count_9.T  =  count_0 * count_1 * count_2 * count_3 * 
	count_4 * count_5 * count_6 * count_7 * count_8.FBK.LFBK
    count_9.CLKF  =  clock	;FCLK/GCK
    count_9.PRLD  =  GND
GLOBALS | 1 | 2 | clock

MACROCELL | 5 | 5 | N550
ATTRIBUTES | 396034 | 0
INPUTS | 0
EQ | 1 | 
    "seg<7>"  =  Vcc

MACROCELL | 5 | 7 | N551
ATTRIBUTES | 396034 | 0
INPUTS | 0
EQ | 1 | 
    "sl<0>"  =  Gnd

MACROCELL | 5 | 8 | N551$BUF0
ATTRIBUTES | 396034 | 0
INPUTS | 0
EQ | 1 | 
    "sl<1>"  =  Gnd

MACROCELL | 5 | 10 | N551$BUF1
ATTRIBUTES | 396034 | 0
INPUTS | 0
EQ | 1 | 
    "sl<2>"  =  Gnd

MACROCELL | 5 | 11 | N551$BUF2
ATTRIBUTES | 396034 | 0
INPUTS | 0
EQ | 1 | 
    "sl<3>"  =  Gnd

PIN | clock | 0 | 11 | 4096 | 28 | 4 | 3 | 4 | 5 | 4 | 4 | 4 | 2 | 0 | 17 | 0 | 16 | 5 | 17 | 5 | 16 | 5 | 15 | 5 | 14 | 5 | 13 | 5 | 12 | 4 | 17 | 4 | 15 | 4 | 12 | 4 | 10 | 0 | 15 | 4 | 9 | 4 | 8 | 4 | 7 | 4 | 6 | 0 | 14 | 0 | 13 | 0 | 12 | 0 | 11 | 0 | 10 | 5 | 9 | 5 | 6
PIN | seg<1> | 4 | 13 | 536871040
PIN | seg<4> | 5 | 1 | 536871040
PIN | seg<3> | 4 | 16 | 536871040
PIN | seg<5> | 5 | 2 | 536871040
PIN | seg<0> | 4 | 11 | 536871040
PIN | seg<2> | 4 | 14 | 536871040
PIN | seg<6> | 5 | 4 | 536871040
PIN | seg<7> | 5 | 5 | 536871040
PIN | sl<0> | 5 | 7 | 536871040
PIN | sl<1> | 5 | 8 | 536871040
PIN | sl<2> | 5 | 10 | 536871040
PIN | sl<3> | 5 | 11 | 536871040
上一页 12
💿 文件大小 90 K
👤 上传用户 chayangccc
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#dp_xiliux #Verilog #CPLD #LED
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