dds_vhdl.map.qmsg

基于fpga的正弦波发生器设计

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Nov 22 19:37:42 2006 " "Info: Processing started: Wed Nov 22 19:37:42 2006" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off dds_vhdl -c dds_vhdl " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off dds_vhdl -c dds_vhdl" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "dds_vhdl.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file dds_vhdl.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 dds_vhdl-one " "Info: Found design unit 1: dds_vhdl-one" {  } { { "dds_vhdl.vhd" "" { Text "E:/lgQ/EDA/peda/sin/dds_vhdl.vhd" 11 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 dds_vhdl " "Info: Found entity 1: dds_vhdl" {  } { { "dds_vhdl.vhd" "" { Text "E:/lgQ/EDA/peda/sin/dds_vhdl.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "reg32b.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file reg32b.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 reg32b-behav " "Info: Found design unit 1: reg32b-behav" {  } { { "reg32b.vhd" "" { Text "E:/lgQ/EDA/peda/sin/reg32b.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 reg32b " "Info: Found entity 1: reg32b" {  } { { "reg32b.vhd" "" { Text "E:/lgQ/EDA/peda/sin/reg32b.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "adder32b.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file adder32b.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 adder32b-behav " "Info: Found design unit 1: adder32b-behav" {  } { { "adder32b.vhd" "" { Text "E:/lgQ/EDA/peda/sin/adder32b.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 adder32b " "Info: Found entity 1: adder32b" {  } { { "adder32b.vhd" "" { Text "E:/lgQ/EDA/peda/sin/adder32b.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "adder10b.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file adder10b.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 adder10b-behav " "Info: Found design unit 1: adder10b-behav" {  } { { "adder10b.vhd" "" { Text "E:/lgQ/EDA/peda/sin/adder10b.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 adder10b " "Info: Found entity 1: adder10b" {  } { { "adder10b.vhd" "" { Text "E:/lgQ/EDA/peda/sin/adder10b.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "reg10b.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file reg10b.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 reg10b-behav " "Info: Found design unit 1: reg10b-behav" {  } { { "reg10b.vhd" "" { Text "E:/lgQ/EDA/peda/sin/reg10b.vhd" 8 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 reg10b " "Info: Found entity 1: reg10b" {  } { { "reg10b.vhd" "" { Text "E:/lgQ/EDA/peda/sin/reg10b.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "sin_rom.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file sin_rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sin_rom-SYN " "Info: Found design unit 1: sin_rom-SYN" {  } { { "sin_rom.vhd" "" { Text "E:/lgQ/EDA/peda/sin/sin_rom.vhd" 55 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 sin_rom " "Info: Found entity 1: sin_rom" {  } { { "sin_rom.vhd" "" { Text "E:/lgQ/EDA/peda/sin/sin_rom.vhd" 45 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "and2ab.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file and2ab.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 and2ab-behav " "Info: Found design unit 1: and2ab-behav" {  } { { "and2ab.vhd" "" { Text "E:/lgQ/EDA/peda/sin/and2ab.vhd" 7 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 and2ab " "Info: Found entity 1: and2ab" {  } { { "and2ab.vhd" "" { Text "E:/lgQ/EDA/peda/sin/and2ab.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pll1.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file pll1.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 pll1-SYN " "Info: Found design unit 1: pll1-SYN" {  } { { "pll1.vhd" "" { Text "E:/lgQ/EDA/peda/sin/pll1.vhd" 55 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 pll1 " "Info: Found entity 1: pll1" {  } { { "pll1.vhd" "" { Text "E:/lgQ/EDA/peda/sin/pll1.vhd" 45 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "dds_vhdl " "Info: Elaborating entity \"dds_vhdl\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "adder32b adder32b:u1 " "Info: Elaborating entity \"adder32b\" for hierarchy \"adder32b:u1\"" {  } { { "dds_vhdl.vhd" "u1" { Text "E:/lgQ/EDA/peda/sin/dds_vhdl.vhd" 63 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "reg32b reg32b:u2 " "Info: Elaborating entity \"reg32b\" for hierarchy \"reg32b:u2\"" {  } { { "dds_vhdl.vhd" "u2" { Text "E:/lgQ/EDA/peda/sin/dds_vhdl.vhd" 64 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sin_rom sin_rom:u3 " "Info: Elaborating entity \"sin_rom\" for hierarchy \"sin_rom:u3\"" {  } { { "dds_vhdl.vhd" "u3" { Text "E:/lgQ/EDA/peda/sin/dds_vhdl.vhd" 65 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus60/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/altsyncram.tdf" 426 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram sin_rom:u3\|altsyncram:altsyncram_component " "Info: Elaborating entity \"altsyncram\" for hierarchy \"sin_rom:u3\|altsyncram:altsyncram_component\"" {  } { { "sin_rom.vhd" "altsyncram_component" { Text "E:/lgQ/EDA/peda/sin/sin_rom.vhd" 86 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "sin_rom:u3\|altsyncram:altsyncram_component " "Info: Elaborated megafunction instantiation \"sin_rom:u3\|altsyncram:altsyncram_component\"" {  } { { "sin_rom.vhd" "" { Text "E:/lgQ/EDA/peda/sin/sin_rom.vhd" 86 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_o351.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_o351.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_o351 " "Info: Found entity 1: altsyncram_o351" {  } { { "db/altsyncram_o351.tdf" "" { Text "E:/lgQ/EDA/peda/sin/db/altsyncram_o351.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_o351 sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_o351:auto_generated " "Info: Elaborating entity \"altsyncram_o351\" for hierarchy \"sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_o351:auto_generated\"" {  } { { "altsyncram.tdf" "auto_generated" { Text "c:/altera/quartus60/libraries/megafunctions/altsyncram.tdf" 905 4 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_eui2.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_eui2.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_eui2 " "Info: Found entity 1: altsyncram_eui2" {  } { { "db/altsyncram_eui2.tdf" "" { Text "E:/lgQ/EDA/peda/sin/db/altsyncram_eui2.tdf" 36 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altsyncram_eui2 sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_o351:auto_generated\|altsyncram_eui2:altsyncram1 " "Info: Elaborating entity \"altsyncram_eui2\" for hierarchy \"sin_rom:u3\|altsyncram:altsyncram_component\|altsyncram_o351:auto_generated\|altsyncram_eui2:altsyncram1\"" {  } { { "db/altsyncram_o351.tdf" "altsyncram1" { Text "E:/lgQ/EDA/peda/sin/db/altsyncram_o351.tdf" 34 2 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}