pwmtest.fit.eqn

利用VHDL实现CPLD（EMP240T100C5）的PWM输出

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--B1_pwm is pwm_fpga:pwm_control|pwm at LC_X7_Y4_N3
--operation mode is normal

B1_pwm_lut_out = !B1_pwm;
B1_pwm = DFFEAS(B1_pwm_lut_out, !GLOBAL(B1_rco_int), !GLOBAL(RST), , , , , , );


--B1_rco_int is pwm_fpga:pwm_control|rco_int at LC_X5_Y3_N3
--operation mode is normal

B1_rco_int_lut_out = B1_cnt_out_int[7] & (!B1L4) # !B1_cnt_out_int[7] & !B1L5;
B1_rco_int = DFFEAS(B1_rco_int_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , , , , );


--B1_cnt_out_int[6] is pwm_fpga:pwm_control|cnt_out_int[6] at LC_X7_Y4_N5
--operation mode is normal

B1_cnt_out_int[6]_lut_out = B1_cnt_out_int[6] $ (B1L61 & (B1L71));
B1_cnt_out_int[6] = DFFEAS(B1_cnt_out_int[6]_lut_out, GLOBAL(pwm_clkdiv[7]), VCC, , , B1_reg_out[6], !GLOBAL(B1_rco_int), , );


--B1_cnt_out_int[5] is pwm_fpga:pwm_control|cnt_out_int[5] at LC_X5_Y4_N9
--operation mode is normal

B1_cnt_out_int[5]_lut_out = !B1L81;
B1_cnt_out_int[5] = DFFEAS(B1_cnt_out_int[5]_lut_out, GLOBAL(pwm_clkdiv[7]), VCC, , B1L91, B1_reg_out[5], !GLOBAL(B1_rco_int), , );


--B1_cnt_out_int[4] is pwm_fpga:pwm_control|cnt_out_int[4] at LC_X5_Y4_N0
--operation mode is normal

B1_cnt_out_int[4]_lut_out = !B1L02;
B1_cnt_out_int[4] = DFFEAS(B1_cnt_out_int[4]_lut_out, GLOBAL(pwm_clkdiv[7]), VCC, , B1L12, B1_reg_out[4], !GLOBAL(B1_rco_int), , );


--B1_cnt_out_int[2] is pwm_fpga:pwm_control|cnt_out_int[2] at LC_X7_Y4_N9
--operation mode is normal

B1_cnt_out_int[2]_lut_out = B1L32;
B1_cnt_out_int[2] = DFFEAS(B1_cnt_out_int[2]_lut_out, GLOBAL(pwm_clkdiv[7]), VCC, , , B1_reg_out[2], !GLOBAL(B1_rco_int), , );


--B1_cnt_out_int[1] is pwm_fpga:pwm_control|cnt_out_int[1] at LC_X7_Y4_N7
--operation mode is normal

B1_cnt_out_int[1]_lut_out = B1L52;
B1_cnt_out_int[1] = DFFEAS(B1_cnt_out_int[1]_lut_out, GLOBAL(pwm_clkdiv[7]), VCC, , , B1_reg_out[1], !GLOBAL(B1_rco_int), , );


--B1_cnt_out_int[0] is pwm_fpga:pwm_control|cnt_out_int[0] at LC_X6_Y4_N0
--operation mode is normal

B1_cnt_out_int[0]_lut_out = !B1_cnt_out_int[0];
B1_cnt_out_int[0] = DFFEAS(B1_cnt_out_int[0]_lut_out, GLOBAL(pwm_clkdiv[7]), VCC, , B1L62, B1_reg_out[0], !GLOBAL(B1_rco_int), , );


--B1L3 is pwm_fpga:pwm_control|cnt_out_int[0]~3721 at LC_X7_Y4_N0
--operation mode is normal

B1L3 = B1_cnt_out_int[3] & B1_cnt_out_int[2] & B1_cnt_out_int[1] & B1_cnt_out_int[0];


--B1L4 is pwm_fpga:pwm_control|cnt_out_int[0]~3722 at LC_X7_Y4_N1
--operation mode is normal

B1L4 = B1_cnt_out_int[6] & B1_cnt_out_int[5] & B1_cnt_out_int[4] & B1L3;


--B1L51 is pwm_fpga:pwm_control|cnt_out_int~3723 at LC_X6_Y4_N2
--operation mode is normal

B1L51 = !B1_cnt_out_int[1] & !B1_cnt_out_int[0] & !B1_cnt_out_int[2] & !B1_cnt_out_int[3];


--B1L5 is pwm_fpga:pwm_control|cnt_out_int[0]~3724 at LC_X6_Y4_N1
--operation mode is normal

B1L5 = !B1_cnt_out_int[4] & !B1_cnt_out_int[6] & !B1_cnt_out_int[5] & B1L51;


--pwm_clkdiv[7] is pwm_clkdiv[7] at LC_X2_Y3_N7
--operation mode is normal

pwm_clkdiv[7]_carry_eqn = (!A1L53 & A1L24) # (A1L53 & A1L34);
pwm_clkdiv[7]_lut_out = pwm_clkdiv[7] $ pwm_clkdiv[7]_carry_eqn;
pwm_clkdiv[7] = DFFEAS(pwm_clkdiv[7]_lut_out, GLOBAL(clkfast), VCC, , , , , , );


--B1L6 is pwm_fpga:pwm_control|cnt_out_int[0]~3725 at LC_X5_Y4_N1
--operation mode is normal

B1L6 = B1_cnt_out_int[2] & B1_cnt_out_int[1] & B1_cnt_out_int[0];


--B1L61 is pwm_fpga:pwm_control|cnt_out_int~3726 at LC_X5_Y4_N3
--operation mode is normal

B1L61 = B1_cnt_out_int[4] & B1_cnt_out_int[3] & (B1L6) # !B1_cnt_out_int[4] & (B1L51);


--B1L33 is pwm_fpga:pwm_control|process1~133 at LC_X6_Y4_N3
--operation mode is normal

B1L33 = B1_rco_int & !B1_pwm & (B1_cnt_out_int[7] # !B1L5);


--B1L43 is pwm_fpga:pwm_control|process1~134 at LC_X7_Y4_N2
--operation mode is normal

B1L43 = B1_rco_int & B1_pwm & (!B1L4 # !B1_cnt_out_int[7]);


--B1L71 is pwm_fpga:pwm_control|cnt_out_int~3727 at LC_X7_Y4_N4
--operation mode is normal

B1L71 = B1L43 & B1_cnt_out_int[4] & B1_cnt_out_int[5] # !B1L43 & !B1_cnt_out_int[4] & !B1_cnt_out_int[5] & B1L33;


--B1_reg_out[6] is pwm_fpga:pwm_control|reg_out[6] at LC_X4_Y2_N4
--operation mode is normal

B1_reg_out[6]_lut_out = GND;
B1_reg_out[6] = DFFEAS(B1_reg_out[6]_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , SW[6], , , VCC);


--B1L81 is pwm_fpga:pwm_control|cnt_out_int~3729 at LC_X5_Y4_N8
--operation mode is normal

B1L81 = B1_cnt_out_int[5] $ (B1L43 & !B1L3 # !B1L43 & (!B1L51));


--B1L91 is pwm_fpga:pwm_control|cnt_out_int~3730 at LC_X5_Y4_N7
--operation mode is normal

B1L91 = B1_cnt_out_int[4] & (B1L43) # !B1_cnt_out_int[4] & B1L33 & !B1L43;


--B1_reg_out[5] is pwm_fpga:pwm_control|reg_out[5] at LC_X3_Y2_N0
--operation mode is normal

B1_reg_out[5]_lut_out = GND;
B1_reg_out[5] = DFFEAS(B1_reg_out[5]_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , SW[5], , , VCC);


--B1L7 is pwm_fpga:pwm_control|cnt_out_int[0]~3731 at LC_X5_Y4_N6
--operation mode is normal

B1L7 = !B1_cnt_out_int[2] & !B1_cnt_out_int[1] & !B1_cnt_out_int[0];


--B1L02 is pwm_fpga:pwm_control|cnt_out_int~3732 at LC_X5_Y4_N2
--operation mode is normal

B1L02 = B1_cnt_out_int[4] $ (B1L43 & (!B1L6) # !B1L43 & !B1L7);


--B1L12 is pwm_fpga:pwm_control|cnt_out_int~3733 at LC_X6_Y4_N4
--operation mode is normal

B1L12 = B1_cnt_out_int[3] & B1L43 # !B1_cnt_out_int[3] & !B1L43 & B1L33;


--B1_reg_out[4] is pwm_fpga:pwm_control|reg_out[4] at LC_X3_Y3_N0
--operation mode is normal

B1_reg_out[4]_lut_out = GND;
B1_reg_out[4] = DFFEAS(B1_reg_out[4]_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , SW[4], , , VCC);


--B1_cnt_out_int[3] is pwm_fpga:pwm_control|cnt_out_int[3] at LC_X6_Y4_N9
--operation mode is normal

B1_cnt_out_int[3]_qfbk = B1_cnt_out_int[3];
B1_cnt_out_int[3]_lut_out = B1_cnt_out_int[3]_qfbk $ (B1L43 & B1L6 # !B1L43 & (B1L92));
B1_cnt_out_int[3] = DFFEAS(B1_cnt_out_int[3]_lut_out, GLOBAL(pwm_clkdiv[7]), VCC, , , B1_reg_out[3], !GLOBAL(B1_rco_int), , );


--B1_reg_out[3] is pwm_fpga:pwm_control|reg_out[3] at LC_X3_Y3_N4
--operation mode is normal

B1_reg_out[3]_lut_out = GND;
B1_reg_out[3] = DFFEAS(B1_reg_out[3]_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , SW[3], , , VCC);


--B1L13 is pwm_fpga:pwm_control|INC~206 at LC_X5_Y4_N5
--operation mode is normal

B1L13 = B1_cnt_out_int[2] $ (!B1_cnt_out_int[0] # !B1_cnt_out_int[1]);


--B1L32 is pwm_fpga:pwm_control|cnt_out_int~3735 at LC_X7_Y4_N8
--operation mode is normal

B1L32 = B1L43 & !B1L3 & !B1L13 # !B1L43 & (B1L03);


--B1_reg_out[2] is pwm_fpga:pwm_control|reg_out[2] at LC_X4_Y3_N0
--operation mode is normal

B1_reg_out[2]_lut_out = GND;
B1_reg_out[2] = DFFEAS(B1_reg_out[2]_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , SW[2], , , VCC);


--B1L42 is pwm_fpga:pwm_control|cnt_out_int~3736 at LC_X6_Y4_N7
--operation mode is normal

B1L42 = B1L33 & (B1L51 # B1_cnt_out_int[1] $ !B1_cnt_out_int[0]) # !B1L33 & B1_cnt_out_int[1];


--B1L23 is pwm_fpga:pwm_control|INC~207 at LC_X5_Y4_N4
--operation mode is normal

B1L23 = B1_cnt_out_int[1] $ B1_cnt_out_int[0];


--B1L52 is pwm_fpga:pwm_control|cnt_out_int~3737 at LC_X7_Y4_N6
--operation mode is normal

B1L52 = B1L43 & B1L23 & !B1L3 # !B1L43 & (B1L42);


--B1_reg_out[1] is pwm_fpga:pwm_control|reg_out[1] at LC_X2_Y4_N2
--operation mode is normal

B1_reg_out[1]_lut_out = GND;
B1_reg_out[1] = DFFEAS(B1_reg_out[1]_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , SW[1], , , VCC);


--B1L62 is pwm_fpga:pwm_control|cnt_out_int~3738 at LC_X6_Y4_N6
--operation mode is normal

B1L62 = B1L43 # B1L33;


--B1_reg_out[0] is pwm_fpga:pwm_control|reg_out[0] at LC_X2_Y4_N6
--operation mode is normal

B1_reg_out[0]_lut_out = GND;
B1_reg_out[0] = DFFEAS(B1_reg_out[0]_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , SW[0], , , VCC);


--B1L72 is pwm_fpga:pwm_control|cnt_out_int~3739 at LC_X5_Y3_N2
--operation mode is normal

B1L72 = B1_cnt_out_int[7] & (B1_pwm # !B1L5 # !B1_rco_int);


--B1_cnt_out_int[7] is pwm_fpga:pwm_control|cnt_out_int[7] at LC_X5_Y3_N0
--operation mode is normal

B1_cnt_out_int[7]_qfbk = B1_cnt_out_int[7];
B1_cnt_out_int[7]_lut_out = B1L43 & (B1L4 $ B1_cnt_out_int[7]_qfbk) # !B1L43 & (B1L72);
B1_cnt_out_int[7] = DFFEAS(B1_cnt_out_int[7]_lut_out, GLOBAL(pwm_clkdiv[7]), VCC, , , B1_reg_out[7], !GLOBAL(B1_rco_int), , );


--B1_reg_out[7] is pwm_fpga:pwm_control|reg_out[7] at LC_X4_Y2_N0
--operation mode is normal

B1_reg_out[7]_lut_out = GND;
B1_reg_out[7] = DFFEAS(B1_reg_out[7]_lut_out, GLOBAL(pwm_clkdiv[7]), !GLOBAL(RST), , , SW[7], , , VCC);


--pwm_clkdiv[6] is pwm_clkdiv[6] at LC_X2_Y3_N6
--operation mode is arithmetic

pwm_clkdiv[6]_carry_eqn = (!A1L53 & A1L93) # (A1L53 & A1L04);
pwm_clkdiv[6]_lut_out = pwm_clkdiv[6] $ (!pwm_clkdiv[6]_carry_eqn);
pwm_clkdiv[6] = DFFEAS(pwm_clkdiv[6]_lut_out, GLOBAL(clkfast), VCC, , , , , , );

--A1L24 is pwm_clkdiv[6]~62 at LC_X2_Y3_N6
--operation mode is arithmetic

A1L24_cout_0 = pwm_clkdiv[6] & (!A1L93);
A1L24 = CARRY(A1L24_cout_0);

--A1L34 is pwm_clkdiv[6]~62COUT1_105 at LC_X2_Y3_N6
--operation mode is arithmetic

A1L34_cout_1 = pwm_clkdiv[6] & (!A1L04);
A1L34 = CARRY(A1L34_cout_1);


--pwm_clkdiv[5] is pwm_clkdiv[5] at LC_X2_Y3_N5
--operation mode is arithmetic

pwm_clkdiv[5]_carry_eqn = (!A1L53 & GND) # (A1L53 & VCC);
pwm_clkdiv[5]_lut_out = pwm_clkdiv[5] $ (pwm_clkdiv[5]_carry_eqn);
pwm_clkdiv[5] = DFFEAS(pwm_clkdiv[5]_lut_out, GLOBAL(clkfast), VCC, , , , , , );

--A1L93 is pwm_clkdiv[5]~66 at LC_X2_Y3_N5
--operation mode is arithmetic

A1L93_cout_0 = !A1L53 # !pwm_clkdiv[5];
A1L93 = CARRY(A1L93_cout_0);

--A1L04 is pwm_clkdiv[5]~66COUT1_103 at LC_X2_Y3_N5
--operation mode is arithmetic

A1L04_cout_1 = !A1L53 # !pwm_clkdiv[5];
A1L04 = CARRY(A1L04_cout_1);


--pwm_clkdiv[4] is pwm_clkdiv[4] at LC_X2_Y3_N4
--operation mode is arithmetic

pwm_clkdiv[4]_lut_out = pwm_clkdiv[4] $ (!A1L23);
pwm_clkdiv[4] = DFFEAS(pwm_clkdiv[4]_lut_out, GLOBAL(clkfast), VCC, , , , , , );

--A1L53 is pwm_clkdiv[4]~70 at LC_X2_Y3_N4
--operation mode is arithmetic

A1L53 = A1L63;


--pwm_clkdiv[3] is pwm_clkdiv[3] at LC_X2_Y3_N3
--operation mode is arithmetic

pwm_clkdiv[3]_lut_out = pwm_clkdiv[3] $ (A1L92);
pwm_clkdiv[3] = DFFEAS(pwm_clkdiv[3]_lut_out, GLOBAL(clkfast), VCC, , , , , , );

--A1L23 is pwm_clkdiv[3]~74 at LC_X2_Y3_N3
--operation mode is arithmetic

A1L23_cout_0 = !A1L92 # !pwm_clkdiv[3];
A1L23 = CARRY(A1L23_cout_0);

--A1L33 is pwm_clkdiv[3]~74COUT1_101 at LC_X2_Y3_N3
--operation mode is arithmetic

A1L33_cout_1 = !A1L03 # !pwm_clkdiv[3];
A1L33 = CARRY(A1L33_cout_1);


--pwm_clkdiv[2] is pwm_clkdiv[2] at LC_X2_Y3_N2
--operation mode is arithmetic

pwm_clkdiv[2]_lut_out = pwm_clkdiv[2] $ !A1L62;
pwm_clkdiv[2] = DFFEAS(pwm_clkdiv[2]_lut_out, GLOBAL(clkfast), VCC, , , , , , );

--A1L92 is pwm_clkdiv[2]~78 at LC_X2_Y3_N2
--operation mode is arithmetic

A1L92_cout_0 = pwm_clkdiv[2] & !A1L62;
A1L92 = CARRY(A1L92_cout_0);

--A1L03 is pwm_clkdiv[2]~78COUT1_100 at LC_X2_Y3_N2
--operation mode is arithmetic

A1L03_cout_1 = pwm_clkdiv[2] & !A1L72;
A1L03 = CARRY(A1L03_cout_1);


--pwm_clkdiv[1] is pwm_clkdiv[1] at LC_X2_Y3_N1
--operation mode is arithmetic

pwm_clkdiv[1]_lut_out = pwm_clkdiv[1] $ A1L32;
pwm_clkdiv[1] = DFFEAS(pwm_clkdiv[1]_lut_out, GLOBAL(clkfast), VCC, , , , , , );

--A1L62 is pwm_clkdiv[1]~82 at LC_X2_Y3_N1
--operation mode is arithmetic

A1L62_cout_0 = !A1L32 # !pwm_clkdiv[1];
A1L62 = CARRY(A1L62_cout_0);

--A1L72 is pwm_clkdiv[1]~82COUT1_98 at LC_X2_Y3_N1
--operation mode is arithmetic

A1L72_cout_1 = !A1L42 # !pwm_clkdiv[1];
A1L72 = CARRY(A1L72_cout_1);


--pwm_clkdiv[0] is pwm_clkdiv[0] at LC_X2_Y3_N0
--operation mode is arithmetic

pwm_clkdiv[0]_lut_out = !pwm_clkdiv[0];
pwm_clkdiv[0] = DFFEAS(pwm_clkdiv[0]_lut_out, GLOBAL(clkfast), VCC, , , , , , );

--A1L32 is pwm_clkdiv[0]~86 at LC_X2_Y3_N0
--operation mode is arithmetic

A1L32_cout_0 = pwm_clkdiv[0];
A1L32 = CARRY(A1L32_cout_0);

--A1L42 is pwm_clkdiv[0]~86COUT1_96 at LC_X2_Y3_N0
--operation mode is arithmetic

A1L42_cout_1 = pwm_clkdiv[0];
A1L42 = CARRY(A1L42_cout_1);


--B1L92 is pwm_fpga:pwm_control|cnt_out_int~3741 at LC_X6_Y4_N8
--operation mode is normal

B1L92 = !B1_cnt_out_int[1] & !B1_cnt_out_int[0] & !B1_cnt_out_int[2] & B1L33;


--B1L03 is pwm_fpga:pwm_control|cnt_out_int~3742 at LC_X6_Y4_N5
--operation mode is normal

B1L03 = B1_cnt_out_int[2] $ (!B1_cnt_out_int[1] & !B1_cnt_out_int[0] & B1L33);


--SW[0] is SW[0] at PIN_28
--operation mode is input

SW[0] = INPUT();


--SW[1] is SW[1] at PIN_29
--operation mode is input

SW[1] = INPUT();


--SW[2] is SW[2] at PIN_30
--operation mode is input

SW[2] = INPUT();


--SW[3] is SW[3] at PIN_33
--operation mode is input

SW[3] = INPUT();


--SW[4] is SW[4] at PIN_34
--operation mode is input

SW[4] = INPUT();


--SW[5] is SW[5] at PIN_35
--operation mode is input

SW[5] = INPUT();


--SW[6] is SW[6] at PIN_36
--operation mode is input

SW[6] = INPUT();


--SW[7] is SW[7] at PIN_37
--operation mode is input

SW[7] = INPUT();


--RST is RST at PIN_78
--operation mode is input

RST = INPUT();


--clkfast is clkfast at PIN_12
--operation mode is input

clkfast = INPUT();


--pwm_out is pwm_out at PIN_73
--operation mode is output

pwm_out = OUTPUT(B1_pwm);


--LED[0] is LED[0] at PIN_4
--operation mode is output

LED[0] = OUTPUT(!SW[0]);


--LED[1] is LED[1] at PIN_5
--operation mode is output

LED[1] = OUTPUT(!SW[1]);


--LED[2] is LED[2] at PIN_6
--operation mode is output

LED[2] = OUTPUT(!SW[2]);


--LED[3] is LED[3] at PIN_7
--operation mode is output

LED[3] = OUTPUT(!SW[3]);


--LED[4] is LED[4] at PIN_8
--operation mode is output

LED[4] = OUTPUT(!SW[4]);


--LED[5] is LED[5] at PIN_15
--operation mode is output

LED[5] = OUTPUT(!SW[5]);


--LED[6] is LED[6] at PIN_16
--operation mode is output

LED[6] = OUTPUT(!SW[6]);


--LED[7] is LED[7] at PIN_17
--operation mode is output

LED[7] = OUTPUT(!SW[7]);