smallkeybaord.tan.summary

用verilog写的4*4小键盘按键检测程序。本工程已经编译好。可以直接在Atera DE1 Fpga开发板上运行

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 7.687 ns
From           : GPIO2[2]
To             : LEDG[2]~reg0
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 9.830 ns
From           : LEDG[3]~reg0
To             : LEDG[3]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -3.597 ns
From           : GPIO2[2]
To             : LEDG[0]~reg0
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 142.78 MHz ( period = 7.004 ns )
From           : i[15]
To             : LEDG[3]~reg0
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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