counter_16_bits.tan.summary

步进电机位置系统 步进电机位置系统block symbol file 步进电机位置系统的Verilog HDL程序设计 已编译通过

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 2.800 ns
From           : lpm_counter:counter_out_rtl_0|dffs[0]
To             : counter_out[0]
From Clock     : Clk_65536Hz
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'Clk_65536Hz'
Slack          : N/A
Required Time  : None
Actual Time    : 172.41 MHz ( period = 5.800 ns )
From           : lpm_counter:counter_out_rtl_0|dffs[0]
To             : lpm_counter:counter_out_rtl_0|dffs[1]
From Clock     : Clk_65536Hz
To Clock       : Clk_65536Hz
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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