sanjiao_rom.tan.talkback.xml

在quartus软件下用VHDL语言实现DDS

<!--
This XML file (created on Tue Apr 01 20:55:18 2008) contains limited information
from the compilation of logic designs using Quartus II software (BUT NOT THE
LOGIC DESIGN FILES) that will be transmitted to Altera Corporation through
operation of the "TalkBack" feature.  To enable/disable this feature, run
qtb_install.exe located in your quartus/bin folder.  For more information, go
to license.txt.
-->
<talkback>
<ver>5.0</ver>
<schema>quartus_version_5.0_build_148.xsd</schema><license>
	<host_id>001bfcf7d9b6</host_id>
	<nic_id>001bfcf7d9b6</nic_id>
	<cdrive_id>46ce0074</cdrive_id>
</license>
<tool>
	<name>Quartus II</name>
	<version>5.0</version>
	<build>Build 148</build>
	<module>quartus_tan.exe</module>
	<edition>Full Version</edition>
	<compilation_end_time>Tue Apr 01 20:55:18 2008</compilation_end_time>
</tool>
<machine>
	<os>Windows XP</os>
	<cpu>
		<proc_count>2</proc_count>
		<cpu_freq units="MHz">1862</cpu_freq>
	</cpu>
	<ram units="MB">1024</ram>
</machine>
<top_file>C:/Documents and Settings/camb/桌面/rom/sanjiao_rom/sanjiao_rom</top_file>
<mep_data>
	<command_line>quartus_tan --read_settings_files=off --write_settings_files=off sanjiao_rom -c sanjiao_rom --timing_analysis_only</command_line>
</mep_data>
<software_data>
	<smart_recompile>off</smart_recompile>
</software_data>
<clock_settings_summary>
	<row>
		<clock_node_name>clock</clock_node_name>
		<type>User Pin</type>
		<fmax_requirement>NONE</fmax_requirement>
		<early_latency units="ns">0.000</early_latency>
		<late_latency units="ns">0.000</late_latency>
		<based_on>NONE</based_on>
		<multiply_base_fmax_by>N/A</multiply_base_fmax_by>
		<divide_base_fmax_by>N/A</divide_base_fmax_by>
		<offset>N/A</offset>
	</row>
</clock_settings_summary>
<performance>
	<nonclk>
		<type>Worst-case tsu</type>
		<slack>N/A</slack>
		<required>None</required>
		<actual>7.684 ns</actual>
	</nonclk>
	<nonclk>
		<type>Worst-case tco</type>
		<slack>N/A</slack>
		<required>None</required>
		<actual>9.120 ns</actual>
	</nonclk>
	<nonclk>
		<type>Worst-case th</type>
		<slack>N/A</slack>
		<required>None</required>
		<actual>-4.644 ns</actual>
	</nonclk>
	<clk>
		<name>clock</name>
		<slack>N/A</slack>
		<required>None</required>
		<actual>197.01 MHz ( period = 5.076 ns )</actual>
	</clk>
</performance>
<compile_id>53D8FA8F</compile_id>
</talkback>