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📄 dds.map.eqn

📁 在quartus软件下用VHDL语言实现DDS
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--Q3_temp[0] is fp:inst|fpq:inst2|temp[0]
--operation mode is normal

Q3_temp[0]_lut_out = Q3L1;
Q3_temp[0] = DFFEAS(Q3_temp[0]_lut_out, Q2_clkout, VCC, , , , , , );


--D1_temp_ph[1] is counter:inst2|temp_ph[1]
--operation mode is normal

D1_temp_ph[1]_lut_out = !D1_temp_ph[1];
D1_temp_ph[1] = DFFEAS(D1_temp_ph[1]_lut_out, C1_inst8, !C1_inst, , D1_temp_ph[0], , , , );


--D1_temp_lj[1] is counter:inst2|temp_lj[1]
--operation mode is normal

D1_temp_lj[1]_lut_out = !D1_temp_lj[1];
D1_temp_lj[1] = DFFEAS(D1_temp_lj[1]_lut_out, C1_inst4, !C1_inst, , D1_temp_lj[0], , , , );


--U1_m8t[1] is xianshi:inst6|m8:inst1|m8t[1]
--operation mode is normal

U1_m8t[1]_lut_out = !U1_m8t[1];
U1_m8t[1] = DFFEAS(U1_m8t[1]_lut_out, Q2_clkout, VCC, , Q3_temp[0], , , , );


--D1L1 is counter:inst2|add~718
--operation mode is normal

D1L1 = U1_m8t[1] & D1_temp_ph[1] # !U1_m8t[1] & (D1_temp_lj[1]);


--D1_temp_ph[2] is counter:inst2|temp_ph[2]
--operation mode is normal

D1_temp_ph[2]_lut_out = !D1_temp_ph[2];
D1_temp_ph[2] = DFFEAS(D1_temp_ph[2]_lut_out, C1_inst8, !C1_inst, , D1L7, , , , );


--D1_temp_lj[2] is counter:inst2|temp_lj[2]
--operation mode is normal

D1_temp_lj[2]_lut_out = !D1_temp_lj[2];
D1_temp_lj[2] = DFFEAS(D1_temp_lj[2]_lut_out, C1_inst4, !C1_inst, , D1L8, , , , );


--D1L2 is counter:inst2|add~719
--operation mode is normal

D1L2 = U1_m8t[1] & D1_temp_ph[2] # !U1_m8t[1] & (D1_temp_lj[2]);


--D1L3 is counter:inst2|add~720
--operation mode is normal

D1L3 = D1L2 $ (Q3_temp[0] # D1L1);


--D1_temp_lj[3] is counter:inst2|temp_lj[3]
--operation mode is normal

D1_temp_lj[3]_lut_out = !D1_temp_lj[3];
D1_temp_lj[3] = DFFEAS(D1_temp_lj[3]_lut_out, C1_inst4, !C1_inst, , D1L9, , , , );


--U1_m8t[2] is xianshi:inst6|m8:inst1|m8t[2]
--operation mode is normal

U1_m8t[2]_lut_out = !U1_m8t[2];
U1_m8t[2] = DFFEAS(U1_m8t[2]_lut_out, Q2_clkout, VCC, , W1L2, , , , );


--W1L1 is xianshi:inst6|74138:inst3|15~102
--operation mode is normal

W1L1 = !U1_m8t[2] & !U1_m8t[1] & !Q3_temp[0];


--T1L71 is xianshi:inst6|mux8_1:inst|res3~196
--operation mode is normal

T1L71 = D1_temp_lj[3] & W1L1 & (D1_temp_lj[1] # D1_temp_lj[2]);


--W1L2 is xianshi:inst6|74138:inst3|15~103
--operation mode is normal

W1L2 = U1_m8t[1] & Q3_temp[0];


--D1_temp_ph[3] is counter:inst2|temp_ph[3]
--operation mode is normal

D1_temp_ph[3]_lut_out = !D1_temp_ph[3];
D1_temp_ph[3] = DFFEAS(D1_temp_ph[3]_lut_out, C1_inst8, !C1_inst, , D1L01, , , , );


--D1L21 is counter:inst2|dis_phten[0]~49
--operation mode is normal

D1L21 = D1_temp_ph[3] & (D1_temp_ph[1] # D1_temp_ph[2]);


--W1L3 is xianshi:inst6|74138:inst3|15~104
--operation mode is normal

W1L3 = U1_m8t[1] & (!U1_m8t[2] & !Q3_temp[0]);


--T1L81 is xianshi:inst6|mux8_1:inst|res3~197
--operation mode is normal

T1L81 = T1L71 # W1L2 # D1L21 & W1L3;


--S1_out1[2] is cef:inst3|lock:inst5|out1[2]
--operation mode is normal

S1_out1[2]_lut_out = R2_temp[2];
S1_out1[2] = DFFEAS(S1_out1[2]_lut_out, Q4_clkout, VCC, , , , , , );


--S1_out0[2] is cef:inst3|lock:inst5|out0[2]
--operation mode is normal

S1_out0[2]_lut_out = R1_temp[2];
S1_out0[2] = DFFEAS(S1_out0[2]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L21 is xianshi:inst6|mux8_1:inst|res2~203
--operation mode is normal

T1L21 = U1_m8t[2] & (U1_m8t[1]) # !U1_m8t[2] & (U1_m8t[1] & D1_temp_ph[2] # !U1_m8t[1] & (D1_temp_lj[2]));


--S1_out2[2] is cef:inst3|lock:inst5|out2[2]
--operation mode is normal

S1_out2[2]_lut_out = R3_temp[2];
S1_out2[2] = DFFEAS(S1_out2[2]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L31 is xianshi:inst6|mux8_1:inst|res2~204
--operation mode is normal

T1L31 = U1_m8t[2] & (T1L21 & (S1_out2[2]) # !T1L21 & S1_out0[2]) # !U1_m8t[2] & (T1L21);


--T1L41 is xianshi:inst6|mux8_1:inst|res2~205
--operation mode is normal

T1L41 = T1L81 & (Q3_temp[0]) # !T1L81 & (Q3_temp[0] & S1_out1[2] # !Q3_temp[0] & (T1L31));


--S1_out3[2] is cef:inst3|lock:inst5|out3[2]
--operation mode is normal

S1_out3[2]_lut_out = R4_temp[2];
S1_out3[2] = DFFEAS(S1_out3[2]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L51 is xianshi:inst6|mux8_1:inst|res2~206
--operation mode is normal

T1L51 = T1L81 & (T1L41 & (S1_out3[2]) # !T1L41 & !D1L3) # !T1L81 & (T1L41);


--T1L61 is xianshi:inst6|mux8_1:inst|res2~207
--operation mode is normal

T1L61 = T1L51 & (U1_m8t[2] # !Q3_temp[0]);


--D1L4 is counter:inst2|add~721
--operation mode is normal

D1L4 = Q3_temp[0] $ (U1_m8t[1] & (D1_temp_ph[1]) # !U1_m8t[1] & D1_temp_lj[1]);


--S1_out1[1] is cef:inst3|lock:inst5|out1[1]
--operation mode is normal

S1_out1[1]_lut_out = R2_temp[1];
S1_out1[1] = DFFEAS(S1_out1[1]_lut_out, Q4_clkout, VCC, , , , , , );


--S1_out0[1] is cef:inst3|lock:inst5|out0[1]
--operation mode is normal

S1_out0[1]_lut_out = R1_temp[1];
S1_out0[1] = DFFEAS(S1_out0[1]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L6 is xianshi:inst6|mux8_1:inst|res1~150
--operation mode is normal

T1L6 = U1_m8t[2] & (U1_m8t[1]) # !U1_m8t[2] & (U1_m8t[1] & D1_temp_ph[1] # !U1_m8t[1] & (D1_temp_lj[1]));


--S1_out2[1] is cef:inst3|lock:inst5|out2[1]
--operation mode is normal

S1_out2[1]_lut_out = R3_temp[1];
S1_out2[1] = DFFEAS(S1_out2[1]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L7 is xianshi:inst6|mux8_1:inst|res1~151
--operation mode is normal

T1L7 = U1_m8t[2] & (T1L6 & (S1_out2[1]) # !T1L6 & S1_out0[1]) # !U1_m8t[2] & (T1L6);


--T1L8 is xianshi:inst6|mux8_1:inst|res1~152
--operation mode is normal

T1L8 = T1L81 & (Q3_temp[0]) # !T1L81 & (Q3_temp[0] & S1_out1[1] # !Q3_temp[0] & (T1L7));


--S1_out3[1] is cef:inst3|lock:inst5|out3[1]
--operation mode is normal

S1_out3[1]_lut_out = R4_temp[1];
S1_out3[1] = DFFEAS(S1_out3[1]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L9 is xianshi:inst6|mux8_1:inst|res1~153
--operation mode is normal

T1L9 = T1L81 & (T1L8 & (S1_out3[1]) # !T1L8 & !D1L4) # !T1L81 & (T1L8);


--T1L01 is xianshi:inst6|mux8_1:inst|res1~154
--operation mode is normal

T1L01 = T1L9 & (U1_m8t[2] # !Q3_temp[0]);


--D1L5 is counter:inst2|add~722
--operation mode is normal

D1L5 = U1_m8t[1] & D1_temp_ph[3] # !U1_m8t[1] & (D1_temp_lj[3]);


--D1L6 is counter:inst2|add~723
--operation mode is normal

D1L6 = D1L5 $ (!Q3_temp[0] & (D1L1 # D1L2));


--S1_out1[3] is cef:inst3|lock:inst5|out1[3]
--operation mode is normal

S1_out1[3]_lut_out = R2_temp[3];
S1_out1[3] = DFFEAS(S1_out1[3]_lut_out, Q4_clkout, VCC, , , , , , );


--S1_out0[3] is cef:inst3|lock:inst5|out0[3]
--operation mode is normal

S1_out0[3]_lut_out = R1_temp[3];
S1_out0[3] = DFFEAS(S1_out0[3]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L91 is xianshi:inst6|mux8_1:inst|res3~198
--operation mode is normal

T1L91 = U1_m8t[2] & (U1_m8t[1]) # !U1_m8t[2] & (U1_m8t[1] & D1_temp_ph[3] # !U1_m8t[1] & (D1_temp_lj[3]));


--S1_out2[3] is cef:inst3|lock:inst5|out2[3]
--operation mode is normal

S1_out2[3]_lut_out = R3_temp[3];
S1_out2[3] = DFFEAS(S1_out2[3]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L02 is xianshi:inst6|mux8_1:inst|res3~199
--operation mode is normal

T1L02 = U1_m8t[2] & (T1L91 & (S1_out2[3]) # !T1L91 & S1_out0[3]) # !U1_m8t[2] & (T1L91);


--T1L12 is xianshi:inst6|mux8_1:inst|res3~200
--operation mode is normal

T1L12 = T1L81 & (Q3_temp[0]) # !T1L81 & (Q3_temp[0] & S1_out1[3] # !Q3_temp[0] & (T1L02));


--S1_out3[3] is cef:inst3|lock:inst5|out3[3]
--operation mode is normal

S1_out3[3]_lut_out = R4_temp[3];
S1_out3[3] = DFFEAS(S1_out3[3]_lut_out, Q4_clkout, VCC, , , , , , );


--T1L22 is xianshi:inst6|mux8_1:inst|res3~201
--operation mode is normal

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