frequency.map.eqn

次源码实现一个扩频接收机系统

B1_SINOUT[14]_lut_out = B1L06;
B1_SINOUT[14] = DFFEAS(B1_SINOUT[14]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[13] is INTIGRATOR_FE:inst|SINOUT[13]
--operation mode is normal

B1_SINOUT[13]_lut_out = B1L85;
B1_SINOUT[13] = DFFEAS(B1_SINOUT[13]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[12] is INTIGRATOR_FE:inst|SINOUT[12]
--operation mode is normal

B1_SINOUT[12]_lut_out = B1L65;
B1_SINOUT[12] = DFFEAS(B1_SINOUT[12]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[11] is INTIGRATOR_FE:inst|SINOUT[11]
--operation mode is normal

B1_SINOUT[11]_lut_out = B1L45;
B1_SINOUT[11] = DFFEAS(B1_SINOUT[11]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[10] is INTIGRATOR_FE:inst|SINOUT[10]
--operation mode is normal

B1_SINOUT[10]_lut_out = B1L25;
B1_SINOUT[10] = DFFEAS(B1_SINOUT[10]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[9] is INTIGRATOR_FE:inst|SINOUT[9]
--operation mode is normal

B1_SINOUT[9]_lut_out = B1L05;
B1_SINOUT[9] = DFFEAS(B1_SINOUT[9]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[8] is INTIGRATOR_FE:inst|SINOUT[8]
--operation mode is normal

B1_SINOUT[8]_lut_out = B1L84;
B1_SINOUT[8] = DFFEAS(B1_SINOUT[8]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[7] is INTIGRATOR_FE:inst|SINOUT[7]
--operation mode is normal

B1_SINOUT[7]_lut_out = B1L64;
B1_SINOUT[7] = DFFEAS(B1_SINOUT[7]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[6] is INTIGRATOR_FE:inst|SINOUT[6]
--operation mode is normal

B1_SINOUT[6]_lut_out = B1L44;
B1_SINOUT[6] = DFFEAS(B1_SINOUT[6]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[5] is INTIGRATOR_FE:inst|SINOUT[5]
--operation mode is normal

B1_SINOUT[5]_lut_out = B1L24;
B1_SINOUT[5] = DFFEAS(B1_SINOUT[5]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[4] is INTIGRATOR_FE:inst|SINOUT[4]
--operation mode is normal

B1_SINOUT[4]_lut_out = B1L04;
B1_SINOUT[4] = DFFEAS(B1_SINOUT[4]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[3] is INTIGRATOR_FE:inst|SINOUT[3]
--operation mode is normal

B1_SINOUT[3]_lut_out = B1L83;
B1_SINOUT[3] = DFFEAS(B1_SINOUT[3]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[2] is INTIGRATOR_FE:inst|SINOUT[2]
--operation mode is normal

B1_SINOUT[2]_lut_out = B1L63;
B1_SINOUT[2] = DFFEAS(B1_SINOUT[2]_lut_out, CLK, VCC, , B1L59, , , , );


--B1_SINOUT[1] is INTIGRATOR_FE:inst|SINOUT[1]
--operation mode is normal

B1_SINOUT[1]_lut_out = B1L43;
B1_SINOUT[1] = DFFEAS(B1_SINOUT[1]_lut_out, CLK, VCC, , B1L59, , , , );


--E4_lcarry[0] is lpm_abs:inst20|lcarry[0]
--operation mode is arithmetic

E4_lcarry[0] = B1_SINOUT[0];

--E4L4 is lpm_abs:inst20|lcarry[0]~COUT
--operation mode is arithmetic

E4L4 = CARRY(E4L3);


--S471L13 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~191
--operation mode is normal

S471L13_carry_eqn = S471L03;
S471L13 = X1L01 $ S771L13 $ S471L13_carry_eqn;


--S471L92 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~190
--operation mode is arithmetic

S471L92_carry_eqn = S471L82;
S471L92 = X1L01 $ S771L92 $ !S471L92_carry_eqn;

--S471L03 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~190COUT
--operation mode is arithmetic

S471L03 = CARRY(X1L01 & S771L92 # !S471L82 # !X1L01 & S771L92 & !S471L82);


--S471L72 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~189
--operation mode is arithmetic

S471L72_carry_eqn = S471L62;
S471L72 = X1L01 $ S771L72 $ S471L72_carry_eqn;

--S471L82 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~189COUT
--operation mode is arithmetic

S471L82 = CARRY(X1L01 & !S771L72 & !S471L62 # !X1L01 & !S471L62 # !S771L72);


--S471L52 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~188
--operation mode is arithmetic

S471L52_carry_eqn = S471L42;
S471L52 = X1L01 $ S771L52 $ !S471L52_carry_eqn;

--S471L62 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~188COUT
--operation mode is arithmetic

S471L62 = CARRY(X1L01 & S771L52 # !S471L42 # !X1L01 & S771L52 & !S471L42);


--S471L32 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~187
--operation mode is arithmetic

S471L32_carry_eqn = S471L22;
S471L32 = X1L01 $ S771L32 $ S471L32_carry_eqn;

--S471L42 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~187COUT
--operation mode is arithmetic

S471L42 = CARRY(X1L01 & !S771L32 & !S471L22 # !X1L01 & !S471L22 # !S771L32);


--S471L12 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~186
--operation mode is arithmetic

S471L12_carry_eqn = S471L02;
S471L12 = X1L01 $ S771L12 $ !S471L12_carry_eqn;

--S471L22 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~186COUT
--operation mode is arithmetic

S471L22 = CARRY(X1L01 & S771L12 # !S471L02 # !X1L01 & S771L12 & !S471L02);


--S471L91 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~185
--operation mode is arithmetic

S471L91_carry_eqn = S471L81;
S471L91 = X1L01 $ S771L91 $ S471L91_carry_eqn;

--S471L02 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~185COUT
--operation mode is arithmetic

S471L02 = CARRY(X1L01 & !S771L91 & !S471L81 # !X1L01 & !S471L81 # !S771L91);


--S471L71 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~184
--operation mode is arithmetic

S471L71_carry_eqn = S471L61;
S471L71 = X1L9 $ S771L71 $ !S471L71_carry_eqn;

--S471L81 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~184COUT
--operation mode is arithmetic

S471L81 = CARRY(X1L9 & S771L71 # !S471L61 # !X1L9 & S771L71 & !S471L61);


--S471L51 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~183
--operation mode is arithmetic

S471L51_carry_eqn = S471L41;
S471L51 = X1L8 $ S771L51 $ S471L51_carry_eqn;

--S471L61 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~183COUT
--operation mode is arithmetic

S471L61 = CARRY(X1L8 & !S771L51 & !S471L41 # !X1L8 & !S471L41 # !S771L51);


--S471L31 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~182
--operation mode is arithmetic

S471L31_carry_eqn = S471L21;
S471L31 = X1L7 $ S771L31 $ !S471L31_carry_eqn;

--S471L41 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~182COUT
--operation mode is arithmetic

S471L41 = CARRY(X1L7 & S771L31 # !S471L21 # !X1L7 & S771L31 & !S471L21);


--S471L11 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~181
--operation mode is arithmetic

S471L11_carry_eqn = S471L01;
S471L11 = X1L6 $ S771L11 $ S471L11_carry_eqn;

--S471L21 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~181COUT
--operation mode is arithmetic

S471L21 = CARRY(X1L6 & !S771L11 & !S471L01 # !X1L6 & !S471L01 # !S771L11);


--S471L9 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~180
--operation mode is arithmetic

S471L9_carry_eqn = S471L8;
S471L9 = X1L5 $ S771L9 $ !S471L9_carry_eqn;

--S471L01 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~180COUT
--operation mode is arithmetic

S471L01 = CARRY(X1L5 & S771L9 # !S471L8 # !X1L5 & S771L9 & !S471L8);


--S471L7 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~179
--operation mode is arithmetic

S471L7_carry_eqn = S471L6;
S471L7 = X1L4 $ S771L7 $ S471L7_carry_eqn;

--S471L8 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~179COUT
--operation mode is arithmetic

S471L8 = CARRY(X1L4 & !S771L7 & !S471L6 # !X1L4 & !S471L6 # !S771L7);


--S471L5 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~178
--operation mode is arithmetic

S471L5_carry_eqn = S471L4;
S471L5 = X1L3 $ S771L5 $ !S471L5_carry_eqn;

--S471L6 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~178COUT
--operation mode is arithmetic

S471L6 = CARRY(X1L3 & S771L5 # !S471L4 # !X1L3 & S771L5 & !S471L4);


--S471L3 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~177
--operation mode is arithmetic

S471L3_carry_eqn = S471L2;
S471L3 = X1L2 $ S771L3 $ S471L3_carry_eqn;

--S471L4 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~177COUT
--operation mode is arithmetic

S471L4 = CARRY(X1L2 & !S771L3 & !S471L2 # !X1L2 & !S471L2 # !S771L3);


--S471L1 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~176
--operation mode is arithmetic

S471L1 = X1L1 $ S771L1;

--S471L2 is lpm_add_sub:inst100|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~176COUT
--operation mode is arithmetic

S471L2 = CARRY(X1L1 & S771L1);


--J6_dffs[0] is lpm_ff:inst98|dffs[0]
--operation mode is normal

J6_dffs[0]_lut_out = J2_dffs[0];
J6_dffs[0] = DFFEAS(J6_dffs[0]_lut_out, M1_safe_q[7], VCC, , , , , , );


--J6_dffs[1] is lpm_ff:inst98|dffs[1]
--operation mode is normal

J6_dffs[1]_lut_out = J2_dffs[1];
J6_dffs[1] = DFFEAS(J6_dffs[1]_lut_out, M1_safe_q[7], VCC, , , , , , );


--S261_cs_buffer[8] is lpm_add_sub:inst57|addcore:adder|a_csnbuffer:result_node|cs_buffer[8]
--operation mode is arithmetic

S261_cs_buffer[8] = S261L02;

--S261_cout[8] is lpm_add_sub:inst57|addcore:adder|a_csnbuffer:result_node|cout[8]
--operation mode is arithmetic

S261_cout[8] = CARRY(S261L02);


--X1L01 is lpm_mux:inst90|mux_1td:auto_generated|w_result245w~5
--operation mode is normal

X1L01_carry_eqn = S261_cout[8];
X1L01 = J6_dffs[0] # J6_dffs[1] & X1L01_carry_eqn;


--X1L9 is lpm_mux:inst90|mux_1td:auto_generated|w_result220w~10
--operation mode is normal

X1L9 = J6_dffs[0] & !J6_dffs[1] # !J6_dffs[0] & !S261_cs_buffer[8] & J6_dffs[1];


--W1_q_a[7] is lpm_rom:inst87|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[7]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W1_q_a[7]_PORT_A_address = BUS(S57L63, D1L6, D1L8, D1L01, D1L21, D1L41, D1L61, D1L81, D1L02, D1L22);
W1_q_a[7]_PORT_A_address_reg = DFFE(W1_q_a[7]_PORT_A_address, W1_q_a[7]_clock_0, , , );
W1_q_a[7]_clock_0 = M1_safe_q[7];
W1_q_a[7]_clock_1 = M1_safe_q[7];
W1_q_a[7]_PORT_A_data_out = MEMORY(, , W1_q_a[7]_PORT_A_address_reg, , , , , , W1_q_a[7]_clock_0, W1_q_a[7]_clock_1, , , , );
W1_q_a[7]_PORT_A_data_out_reg = DFFE(W1_q_a[7]_PORT_A_data_out, W1_q_a[7]_clock_1, , , );
W1_q_a[7] = W1_q_a[7]_PORT_A_data_out_reg[0];


--S261L81 is lpm_add_sub:inst57|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~100
--operation mode is arithmetic

S261L81_carry_eqn = S261L71;
S261L81 = W1_q_a[7] $ (S261L81_carry_eqn);

--S261L91 is lpm_add_sub:inst57|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~100COUT
--operation mode is arithmetic

S261L91 = CARRY(!W1_q_a[7] & !S261L71);


--X1L8 is lpm_mux:inst90|mux_1td:auto_generated|w_result195w~137
--operation mode is normal

X1L8 = J6_dffs[1] & J6_dffs[0] & W1_q_a[7] # !J6_dffs[0] & S261L81 # !J6_dffs[1] & W1_q_a[7] $ (J6_dffs[0]);


--W1_q_a[6] is lpm_rom:inst87|altrom:srom|altsyncram:rom_block|altsyncram_rfm:auto_generated|q_a[6]
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 1
--Port A Logical Depth: 1024, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
W1_q_a[6]_PORT_A_address = BUS(S57L63, D1L6, D1L8, D1L01, D1L21, D1L41, D1L61, D1L81, D1L02, D1L22);
W1_q_a[6]_PORT_A_address_reg = DFFE(W1_q_a[6]_PORT_A_address, W1_q_a[6]_clock_0, , , );
W1_q_a[6]_clock_0 = M1_safe_q[7];
W1_q_a[6]_clock_1 = M1_safe_q[7];
W1_q_a[6]_PORT_A_data_out = MEMORY(, , W1_q_a[6]_PORT_A_address_reg, , , , , , W1_q_a[6]_clock_0, W1_q_a[6]_clock_1, , , , );
W1_q_a[6]_PORT_A_data_out_reg = DFFE(W1_q_a[6]_PORT_A_data_out, W1_q_a[6]_clock_1, , , );
W1_q_a[6] = W1_q_a[6]_PORT_A_data_out_reg[0];


--S261L61 is lpm_add_sub:inst57|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~99
--operation mode is arithmetic

S261L61_carry_eqn = S261L51;