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20.5 Defining cross coverage</div>
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A coverage group can specify cross coverage between two or more coverage points or variables. Cross coverage is specified using the cross construct. When a variable V is part of a cross coverage, SystemVerilog implicitly creates a coverage point for the variable, as if it had been created by the statement coverpoint V;. Thus, a cross involves only coverage points. Expressions cannot be used directly in a cross; a coverage point must be explicitly defined first. </p>
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The syntax for specifying cross coverage is given below. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00897"><pre class="Element12">cover_cross ::= // from Annex A.2.11
[cover_point_identifer <strong><span style="color: #FF0000">:</span></strong>] <strong><span style="color: #FF0000">cross</span></strong> list_of_coverpoints[<strong><span style="color: #FF0000">iff(</span></strong>expression<strong><span style="color: #FF0000">)</span></strong>] select_bins_or_empty
list_of_coverpoints ::= cross_item <strong><span style="color: #FF0000">,</span></strong> cross_item {<strong><span style="color: #FF0000">,</span></strong> cross_item }
cross_item ::=
cover_point_identifier
| variable_identifier
select_bins_or_empty ::=
<strong><span style="color: #FF0000">{</span></strong>{bins_selections_or_option<strong><span style="color: #FF0000">;</span></strong>}<strong><span style="color: #FF0000">}</span></strong>
| <strong><span style="color: #FF0000">;</span></strong>
bins_selection_or_option ::=
{attribute_instance} coverage_option
| {attribute_instance} bins_selection
bins_selection ::= bins_keyword bin_identifier<strong><span style="color: #FF0000">=</span></strong>select_expression[<strong><span style="color: #FF0000">iff(</span></strong>expression<strong><span style="color: #FF0000">)</span></strong>]
select_expression ::=
select_condition
| <strong><span style="color: #FF0000">!</span></strong>select_condition
| select_expression <strong><span style="color: #FF0000">&&</span></strong> select_expression
| select_expression <strong><span style="color: #FF0000">||</span></strong> select_expression
| <strong><span style="color: #FF0000">(</span></strong>select_expression<strong><span style="color: #FF0000">)</span></strong>
select_condition ::= <strong><span style="color: #FF0000">binsof(</span></strong>bins_expression<strong><span style="color: #FF0000">)</span></strong>[intersect<strong><span style="color: #FF0000">{</span></strong>open_range_list<strong><span style="color: #FF0000">}</span></strong>]
bins_expression ::=
variable_identifier
| cover_point_identifier[<strong><span style="color: #FF0000">.</span></strong>bins_identifier]
open_range_list ::= open_value_range {<strong><span style="color: #FF0000">,</span></strong> open_value_range}
open_value_range ::= value_range</pre></div></div>
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<strong>Syntax 20-4—Cross coverage syntax (excerpt from Annex A)</strong></p><p class="Element10">
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The label for a cross declaration provides an optional name. The label also creates a hierarchical scope for the bins defined within the cross. </p>
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The expression within the optional iff provides a conditional guard for the cross coverage. If at any sample point, the condition evaluates to false, the cross coverage is ignored. The expression within the optional iff construct at the end of a cross bin definition provides a per-bin guard condition. If the expression is false, the cross bin is ignored. </p>
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Cross coverage of a set of N coverage points is defined as the coverage of all combinations of all bins associated with the N coverage points, that is, the Cartesian product of the N sets of coverage-point bins. For example: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00898"><pre class="Element12">bit [3:0] a, b;
covergroup cov @(posedge clk);
aXb : cross a, b;
endgroup</pre></div></div>
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The coverage group cov in the example above specifies the cross coverage of two 4-bit variables, a and b. SystemVerilog implicitly creates a coverage point for each variable. Each coverage point has 16 bins, namely auto[0]...auto[15]. The cross of a and b (labeled aXb), therefore, has 256 cross products, and each cross product is a bin of aXb. </p>
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Cross coverage between expressions previously defined as coverage points is also allowed. For example: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00899"><pre class="Element12">bit [3:0] a, b, c;
covergroup cov2 @(posedge clk);
BC: coverpoint b+c;
aXb : cross a, BC;
endgroup</pre></div></div>
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The coverage group cov2 has the same number of cross products as the previous example, but in this case, one of the coverage points is the expression b+c, which is labeled BC. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00900"><pre class="Element12">bit [31:0] a_var;
bit [3:0] b_var;
covergroup cov3 @(posedge clk);
A: coverpoint a_var { bins yy[] = { [0:9] }; }
CC: cross b_var, A;
endgroup</pre></div></div>
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