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<a href="00364.html" target="topic">29.4 VPI coverage extensions</a></div>
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<a href="#" onmousedown="showPopup(this, 'popup00553');"><img src="seealsolink.png" border="0" alt="" title=""></a> SystemVerilog 3.1a语言参考手册</div>
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29.4.3 Obtaining coverage information</div>
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To obtain coverage information, the vpi_get() function is extended with additional VPI properties that can be obtained from existing handles: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code01019"><pre class="Element12">vpi_get(<coverageType>, instance_handle)</pre></div></div>
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Returns the number of covered items of the given coverage type in the given instance. Coverage type is one of the coverage type properties described in Section 29.4.2. For example, given coverage type vpiStatement- Coverage, this call would return the number of covered statements in the instance pointed by instance_handle. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code01020"><pre class="Element12">vpi_get(vpiCovered, assertion_handle)
vpi_get(vpiCovered, statement_handle)
vpi_get(vpiCovered, signal_handle)
vpi_get(vpiCovered, fsm_handle)
vpi_get(vpiCovered, fsm_state_handle)</pre></div></div>
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Returns whether the item referenced by the handle has been covered. For handles that can contain multiple coverable entities, such as statement, fsm and signal handles, the return value indicates how many of the entities have been covered. </p>
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— For assertion handle, the coverable entities are assertions </p>
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— For statement handle, the entities are statements </p>
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— For signal handle, the entities are individual signal bits </p>
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— For fsm handle, the entities are fsm states </p>
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For assertions, vpiCovered implies that the assertion has been attempted, has succeeded at least once and has never failed. More detailed coverage information can be obtained for assertions by the following queries: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code01021"><pre class="Element12">vpi_get(vpiAssertAttemptCovered, assertion_handle)</pre></div></div>
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Returns the number of times the assertion has been attempted. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code01022"><pre class="Element12">vpi_get(vpiAssertSuccessCovered, assertion_handle)</pre></div></div>
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Returns the number of times the assertion has succeeded non-vacuously or, if assertion handle corresponds to a cover sequence, the number of times the sequence has been matched. Refer to Section 17.11.1 and 17.13 for the definition of vacuity. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code01023"><pre class="Element12">vpi_get(vpiAssertVacuousSuccessCovered, assertion_handle)</pre></div></div>
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Returns the number of times the assertion has succeeded vacuously. Refer to Section 17.11.1 and 17.13 for the definition of vacuity. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code01024"><pre class="Element12">vpi_get(vpiAssertFailureCovered, assertion_handle)</pre></div></div>
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Returns the number of times the assertion has failed. For any assertion, the number of attempts that have not yet reached any conclusion (success or failure) can be derived from the formula: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code01025"><pre class="Element12">in progress = attempts - (successes + vacuous success + failures)</pre></div></div>
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The example below illustrates some of these queries: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code01026"><pre class="Element12">module covtest;
bit on = 1, off = 0;
logic clk;
initial begin
clk = 0;
forever begin
#10;
clk = ~clk;
end
end
always @(false) begin
anvr: assert(on ##1 on); // assertion will not be attempted
end
always @(posedge clk) begin
aundf: assert (on ##[1:$] off); // assertion will not pass or fail
afail: assert (on ##1 off); // assertion will always fail on 2nd tick
apass: assert (on ##1 on); // assertion will succeed on each attempt
end
endmodule</pre></div></div>
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For this example, the assertions will have the following coverage results: </p><p class="Element10" style="text-align: center">
<strong>Table 29-3: Assertion coverage results</strong></p><div class="Element63">
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</div></td><td class="Element65" valign="top" width="15%">
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vpiCovered </div></td><td class="Element65" valign="top" width="24%">
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vpiAssertAttempt-<br>Covered </div></td><td class="Element65" valign="top" width="25%">
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vpiAssertSuccess-<br>Covered </div></td><td class="Element65" valign="top" width="25%">
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vpiAssertFailure-<br>Covered </div></td></tr><tr>
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anvr </div></td><td class="Element67" valign="top" width="15%">
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