00546.html

这是一本关于verilog编程语言的教程,对学习verilog语言有帮助

<p class="Element10">
在模块实例语句可以出现的任何地方都可以出现别名语句。如果在别名语句中出现了没有声明数据类型的标识符，那么就隐含成线网，并与模块实例的隐式线网遵从相同的规则。对于来自不同库的单元，下面的例子使用<span style="color: #0000FF">alias</span>并伴随着自动的名字绑定来连接单元管脚，这样就产生一个标准宏： </p><div class="Element170">
<a href="#" onclick="CopyElementToClipboard('code00201');">Copy Code</a></div>
<div class="Element13"><div class="Element12" id="code00201"><pre class="Element12"><span style="color: #0000FF">module</span> lib1_dff<span style="color: #800080">(</span>Reset<span style="color: #800080">,</span> Clk<span style="color: #800080">,</span> Data<span style="color: #800080">,</span> Q<span style="color: #800080">,</span> Q_Bar<span style="color: #800080">);</span>
    ...
<span style="color: #0000FF">endmodule</span>

<span style="color: #0000FF">module</span> lib2_dff<span style="color: #800080">(</span>reset<span style="color: #800080">,</span> clock<span style="color: #800080">,</span> data<span style="color: #800080">,</span> a<span style="color: #800080">,</span> qbar<span style="color: #800080">);</span>
    ...
<span style="color: #0000FF">endmodule</span>

<span style="color: #0000FF">module</span> lib3_dff<span style="color: #800080">(</span>RST<span style="color: #800080">,</span> CLK<span style="color: #800080">,</span> D<span style="color: #800080">,</span> Q<span style="color: #800080">,</span> Q_<span style="color: #800080">);</span>
    ...
<span style="color: #0000FF">endmodule</span>

<span style="color: #0000FF">macromodule</span> my_dff<span style="color: #800080">(</span>rst<span style="color: #800080">,</span> clk<span style="color: #800080">,</span> d<span style="color: #800080">,</span> q<span style="color: #800080">,</span> q_bar<span style="color: #800080">);</span> <span style="color: #008000">// 包装单元</span>
<span style="color: #0000FF">    input</span> rst<span style="color: #800080">,</span> clk<span style="color: #800080">,</span> d<span style="color: #800080">;</span>
<span style="color: #0000FF">    output</span> q<span style="color: #800080">,</span> q_bar<span style="color: #800080">;</span>
<span style="color: #0000FF">    alias</span> rst <span style="color: #800080">=</span> Reset <span style="color: #800080">=</span> reset <span style="color: #800080">=</span> RST<span style="color: #800080">;</span>
<span style="color: #0000FF">    alias</span> clk <span style="color: #800080">=</span> Clk <span style="color: #800080">=</span> clock <span style="color: #800080">=</span> CLK<span style="color: #800080">;</span>
<span style="color: #0000FF">    alias</span> d <span style="color: #800080">=</span> data <span style="color: #800080">=</span> D<span style="color: #800080">;</span>
<span style="color: #0000FF">    alias</span> q <span style="color: #800080">=</span> Q<span style="color: #800080">;</span>
<span style="color: #0000FF">    alias</span> Q_ <span style="color: #800080">=</span> q_bar <span style="color: #800080">=</span> Q_Bar <span style="color: #800080">=</span> qbar<span style="color: #800080">;</span>

<span style="color: #0000FF">    </span><span style="color: #800080">‘</span>LIB_DFF my_dff <span style="color: #800080">(.*);</span> <span style="color: #008000">// LIB_DFF可以是lib1_dff、lib2_dff或lib3_dff中的任意一个</span>

<span style="color: #0000FF">endmodule</span></pre></div></div>
<p class="Element10">
在一条别名语句中使用线网不会修改线网在其它语句中的语法行为。别名在确立的时候执行并且不能取消。</p></div>
</div>
<a name="Group"></a><div class="Element14">
<a onclick="toggleVisibilityStored('Group');" class="a_Element14"><img src="sectionminus.png" border="0" alt="" title="" id="imgGroup">Group</a></div>
<div id="divGroup">
<div class="Element11">
<div class="Element10">
<p class="Element10">
<a href="00875.html" target="topic">第五章 数据声明</a></p></div>
</div>
</div>
<a name="Links"></a><div class="Element14">
<a onclick="toggleVisibilityStored('链接');" class="a_Element14"><img src="sectionminus.png" border="0" alt="" title="" id="img链接">链接</a></div>
<div id="div链接">
<div class="Element11">
<div class="Element10">
<a href="00875.html" target="topic">第五章 数据声明</a></div>
</div>
</div>
</div>
<!-- End Page Content -->

<!-- Begin Page Footer -->
<hr width="98%" align="center" size="1" color="#CCCCCC" />
<table align="center" cellpadding="0" cellspacing="0" border="0">
	<tbody>
		<tr height="10">
			<td></td>
		</tr>
		<tr align="center">
			<td>
<script type="text/javascript"><!--
google_ad_client = "pub-5266859600380184";
google_ad_width = 468;
google_ad_height = 60;
google_ad_format = "468x60_as";
google_ad_type = "text_image";
google_ad_channel ="";
google_page_url = document.location;
//--></script>
<script type="text/javascript"
  src="http://pagead2.googlesyndication.com/pagead/show_ads.js">
</script>
			</td>
		</tr>
		<tr height="15">
			<td></td>
		</tr>
		<tr align="center">
			<td>
				<font size=2>除非特别声明，原文版权归作者所有，如有转摘请注明原作者以及译者（<a href="http://www.fpgatech.net/"  target="_blank">FPGA技术网</a>）信息。<br />
如果您对本主题有何建议或意见，请登陆<a href="http://www.fpgatech.net/forum/forumdisplay.php?fid=18" target="_blank">FPGA开发者家园</a>提交，您的参与是我们前进的动力。</font>
<script language="javascript" type="text/javascript" src="http://js.users.51.la/195685.js"></script>
<noscript><a href="http://www.51.la/?195685" target="_blank"><img alt="&#x6211;&#x8981;&#x5566;&#x514D;&#x8D39;&#x7EDF;&#x8BA1;" src="http://img.users.51.la/195685.asp" style="border:none" /></a></noscript>
			</td>
		</tr>
	</tbody>
</table>

<!-- End Page Footer -->
</div>
</div>

<!-- End Client Area -->
</body></html>