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<title>19.8.2 Virtual interfaces modports and clocking blocks</title>
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19.8.2 Virtual interfaces modports and clocking blocks</div>
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As shown in the example above, once a virtual interface is declared, its clocking block can be referenced using dot-notation. However, this only works for interfaces with no modports. Typically, a device under test and its testbench exhibit modport direction. This common case can be handled by including the clocking in the corresponding modport as described in Section 19.4.5.&nbsp;</p>
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The example below shows how modports used in conjunction with virtual interfaces facilitate the creation of abstract synchronous models. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00858"><pre class="Element12">interface A_Bus( input bit clk );
    wire req, gnt;
    wire [7:0] addr, data;

    clocking sb @(posedge clk);
        input gnt;
        output req, addr;
        inout data;

        property p1;
            req ##[1:3] gnt;
        endproperty
    endclocking

    modport DUT ( input clk, req, addr, // Device under test modport
                  output gnt,
                  inout data );

    modport STB ( clocking sb ); // synchronous testbench modport

    modport TB ( input gnt, // asynchronous testbench modport
                 output req, addr,
                 inout data );
endinterface</pre></div></div>
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The above interface A_Bus can then be instantiated as shown below: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00859"><pre class="Element12">module dev1(A_Bus.DUT b); // Some device: Part of the design
    ...
endmodule

module dev2(A_Bus.DUT b); // Some device: Part of the design
    ...
endmodule

program T (A_Bus.STB b1, A_Bus.STB b2 ); // Testbench: 2 synchronous ports
    ...
endprogram

module top;
    bit clk;
    A_Bus b1( clk );
    A_Bus b2( clk );
    dev1 d1( b1 );
    dev2 d2( b2 );
    T tb( b1, b2 );
endmodule</pre></div></div>
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And, within the testbench program, the virtual interface can refer directly to the clocking block. </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00860"><pre class="Element12">program T (A_Bus.STB b1, A_Bus.STB b2 ); // Testbench: 2 synchronous ports
    typedef virtual A_Bus.STB SYNCTB;

    task request( SYNCTB s );
        s.sb.req &lt;= 1;
    endtask

    task wait_grant( SYNCTB s );
        wait( s.sb.gnt == 1 );
    endtask

    task drive(SYNCTB s, logic [7:0] adr, data );
        if( s.sb.gnt == 0 ) begin
            request(s); // acquire bus if needed
            wait_grant(s);
        end

        s.sb.addr = adr;
        s.sb.data = data;
        repeat(2) @s.sb;
        s.sb.req = 0; //release bus
    endtask

    assert property (b1.p1); // assert property from within program

    initial begin
        drive( b1, $random, $random );
        drive( b2, $random, $random );
    end
endprogram</pre></div></div>
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The example above shows how the clocking block is referenced via the virtual interface by the tasks within the program block.</p></div>
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