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<a href="#" onmousedown="showPopup(this, 'popup00163');"><img src="seealsolink.png" border="0" alt="" title=""></a> SystemVerilog 3.1a语言参考手册</div>
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9.1 简介（一般信息）</div>
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Verilog-2001具有定义了静态进程的<span style="color: #0000FF">always</span>和<span style="color: #0000FF">initial</span>块。 </p>
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在一个用来建模组合逻辑的<span style="color: #0000FF">always</span>块中，如果忘记了<span style="color: #0000FF">else</span>语句会产生一个不期望的锁存器。为了避免这个错误，SystemVerilog加入了专门的<span style="color: #0000FF">always_comb</span>和<span style="color: #0000FF">always_latch</span>块，它向仿真、综合和形式验证工具指明设计意图。SystemVerilog还加入了一个<span style="color: #0000FF">always_ff</span>块来指示时序逻辑。 </p>
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在系统建模过程中，Verilog的一个主要限制是缺乏动态创建进程的能力，这种能力在操作系统中经常出现。虽然Verilog具有<span style="color: #0000FF">fork</span>...<span style="color: #0000FF">jion</span>结构，但它仍然被限制成静态的。 </p>
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SystemVerilog既具有由<span style="color: #0000FF">always</span>、<span style="color: #0000FF">initial</span>或<span style="color: #0000FF">fork</span>引入的静态进程，也具有由<span style="color: #0000FF">fork</span>...<span style="color: #0000FF">join_any</span>和<span style="color: #0000FF">fork</span>...<span style="color: #0000FF">join_none</span>引入的动态进程。 </p>
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SystemVerilog为每一个<span style="color: #0000FF">initial</span>或<span style="color: #0000FF">always</span>块、<span style="color: #0000FF">fork</span>...<span style="color: #0000FF">join</span>块中的每一条并行语句以及为每一个动态进程均创建了一个执行线程。每一条连续赋值语句也被认为是它自己的线程。 </p>
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SystemVerilog 3.1通过增强<span style="color: #0000FF">fork</span>...<span style="color: #0000FF">join</span>结构加入了动态进程的能力，这种方式对于Verilog用户来说是非常自然的。SystemVerilog 3.1还引入了动态进程控制结构，它能够使用动态、父子关系来中止或等待进程。它们是<a href="00605.html" target="topic">wait fork</a>和<a href="00606.html" target="topic">disable fork</a>。</p></div>
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