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这是一本关于verilog编程语言的教程,对学习verilog语言有帮助

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<span style="color: #0000FF">unique</span>和<span style="color: #0000FF">priority</span>关键字适用于整个<span style="color: #0000FF">if...else...if</span>条件。在前面的例子中，在任何一个else的后面插入这两个关键字都是非法的。为了在这一系列中的条件中嵌套另外一个<span style="color: #0000FF">if</span>语句，应该使用<span style="color: #0000FF">begin</span>...<span style="color: #0000FF">end</span>块。&nbsp;</p>
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在Verilog中，具有三种类型的<span style="color: #0000FF">case</span>语句，分别为<span style="color: #0000FF">case</span>、<span style="color: #0000FF">casez</span>和<span style="color: #0000FF">casex</span>。在SystemVerilog中，这三个中的任何一个都可以使用<span style="color: #0000FF">priority</span>或<span style="color: #0000FF">unique</span>限定。<span style="color: #0000FF">priority case</span>仅仅作用于第一个匹配。<span style="color: #0000FF">unique case</span>应该检查<span style="color: #0000FF">case</span>条目的交迭，允许<span style="color: #0000FF">case</span>条目能够并行计算。如果多于一个<span style="color: #0000FF">case</span>条目匹配于<span style="color: #0000FF">case</span>表达式，那么<span style="color: #0000FF">unique case</span>应该发布一条警告信息。如果<span style="color: #0000FF">case</span>被限定为<span style="color: #0000FF">priority</span>或<span style="color: #0000FF">unique</span>，那么，如果没有<span style="color: #0000FF">case</span>条目匹配的话，仿真器应该发布一条警告信息。这些警告信息可以在编译时发布也可以在运行时发布，只要仿真器能够确定这些无效条件。&nbsp;</p>
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注意：通过指定<span style="color: #0000FF">unique</span>或<span style="color: #0000FF">priority</span>，我们没有必要编码一个<span style="color: #0000FF">default</span>条件来包含不期望的条件值。例如： </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00266"><pre class="Element12"><span style="color: #0000FF">bit</span> <span style="color: #800080">[</span><span style="color: #FF0000">2</span><span style="color: #800080">:</span><span style="color: #FF0000">0</span><span style="color: #800080">]</span> a<span style="color: #800080">;</span>

<span style="color: #0000FF">unique case</span><span style="color: #800080">(</span>a<span style="color: #800080">)</span>   <span style="color: #008000">// 值3,5,6,7会引起一个运行时警告</span>
<span style="color: #FF0000">    0</span><span style="color: #800080">,</span><span style="color: #FF0000">1</span><span style="color: #800080">:</span> <span style="color: #0000FF">$display</span><span style="color: #800080">(</span><span style="color: #575D94">&quot;0 or 1&quot;</span><span style="color: #800080">);</span>
    <span style="color: #FF0000">2</span><span style="color: #800080">:</span> <span style="color: #0000FF">$display</span><span style="color: #800080">(</span><span style="color: #575D94">&quot;2&quot;</span><span style="color: #800080">);</span>
    <span style="color: #FF0000">4</span><span style="color: #800080">:</span> <span style="color: #0000FF">$display</span><span style="color: #800080">(</span><span style="color: #575D94">&quot;4&quot;</span><span style="color: #800080">);</span>
<span style="color: #0000FF">endcase</span>

<span style="color: #0000FF">priority</span> <span style="color: #0000FF">case</span><span style="color: #800080">(</span>a<span style="color: #800080">)</span> <span style="color: #008000">// 值4,5,6,7会引起一个运行时警告</span>
<span style="color: #FF0000">    3</span><span style="color: #800080">'</span><span style="color: #0000FF">b</span><span style="color: #FF0000">00?</span><span style="color: #800080">:</span> <span style="color: #0000FF">$display</span><span style="color: #800080">(</span><span style="color: #575D94">&quot;0 or 1&quot;</span><span style="color: #800080">);</span>
<span style="color: #FF0000">    3</span><span style="color: #800080">'</span><span style="color: #0000FF">b</span><span style="color: #FF0000">0??</span><span style="color: #800080">:</span> <span style="color: #0000FF">$display</span><span style="color: #800080">(</span><span style="color: #575D94">&quot;2 or 3&quot;</span><span style="color: #800080">);</span>
<span style="color: #0000FF">endcase</span></pre></div></div>
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<a href="00846.html" target="topic">第八章 过程语句和控制流</a></p></div>
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描述&nbsp;</div></td></tr><tr>
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<a href="00584.html" target="topic">8.4.1 模式匹配</a>&nbsp;</div></td><td class="Element206" valign="top" width="50%">
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对于将一个值与结构体、标签联合体和常量进行比较以及对它们的成员的访问来讲，模式匹配提供了一个形象而又简洁的符号。SystemVerilog为<span style="color: #0000FF">case</span>语句、<span style="color: #0000FF">if</span>语句以及条件表达式加入了模式匹配的能力。在描述那些关联文中的模式匹配之前，我们首先描述一下基本概念。<br><br>模式是在叶子上带有标识符、常量表达式、以及通配符模式“<span style="color: #800080">.*</span>”的标签联合体和结构体表达式的嵌套。对于标签联合体模式，紧跟<span style="color: #0000FF">tagged</span>关键字之后的标识符是一个联合体成员名。对于<span style="color: #0000FF">void</span>成员， 嵌套的成员模式被忽略。 &nbsp;</div></td></tr></table></div></div>
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<a href="00846.html" target="topic">第八章 过程语句和控制流</a>, <a href="00914.html" target="topic">主题</a></div>
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