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28.3 Static information</div>
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This section defines how to obtain assertion handles and other static assertion information.</p></div>
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<a href="00333.html" target="topic">28.3.1 Obtaining assertion handles</a> </div></td><td class="Element206" valign="top" width="50%">
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SystemVerilog extends the VPI module iterator model (i.e., the instance) to encompass assertions, as shown in Figure 28-1.<br><br>The following steps highlight how to obtain the assertion handles for named assertions. </p><p class="Element207" style="text-align: center">
<img src="Figure_28_1.png" border="0" alt="" title=""><br><strong>Figure 28-1 — Encompassing assertions</strong> </p><p class="Element207">
<br>Note: Iteration on assertions from interfaces is not shown in Figure 28-1 since the interface object type is not currently defined in VPI. However the assertion API permits iteration on assertions from interface instance handles and obtaining static information on assertions used in interfaces (see Section 28.3.2.1).<br>1) Iterate all assertions in the design: use a NULL reference handle (ref) to vpi_iterate(), e.g., </div></td></tr><tr>
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<a href="00334.html" target="topic">28.3.2 Obtaining static assertion information</a> </div></td><td class="Element206" valign="top" width="50%">
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The following information about an assertion is considered to be static.
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<li class="Element600">Assertion name</li>
<li class="Element600">Instance in which the assertion occurs</li>
<li class="Element600">Module definition containing the assertion</li>
<li class="Element600">Assertion type
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<li value="1" class="Element600">Sequence</li>
<li value="2" class="Element600">Assert</li>
<li value="3" class="Element600">Cover</li>
<li value="4" class="Element600">Property</li>
<li value="5" class="Element600">ImmediateAssert</li>
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<li class="Element600">Assertion source information: the file, line, and column where the assertion is defined.</li>
<li class="Element600">Assertion clocking block/expression </li>
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