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📁 这是一本关于verilog编程语言的教程,对学习verilog语言有帮助
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<title>17.7.2 序列中的复制</title>
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<a href="00175.html" target="topic">17.7 序列操作</a></div>
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<a href="#" onmousedown="showPopup(this, 'popup00337');"><img src="seealsolink.png" border="0" alt="" title=""></a> SystemVerilog 3.1a语言参考手册</div>
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17.7.2 序列中的复制</div>
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下面是序列复制的语法: </p><div class="Element170">
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<div class="Element13"><div class="Element12" id="code00593"><pre class="Element12">sequence_expr ::=           <span style="color: #008000">// 引用自附录A.2.10</span>
    ...
  | expression_or_dist [boolean_abbrev]
  | <strong><span style="color: #FF0000">(</span></strong>expression_or_dist{<strong><span style="color: #FF0000">,</span></strong> sequence_match_item}<strong><span style="color: #FF0000">)</span></strong> [boolean_abbrev]
  | sequence_instance [sequence_abbrev]
  | <strong><span style="color: #FF0000">(</span></strong>sequence_expr{<strong><span style="color: #FF0000">,</span></strong> sequence_match_item}<strong><span style="color: #FF0000">)</span></strong> [sequence_abbrev]
    ...

boolean_abbrev ::=
    consecutive_repetition
  | non_consecutive_repetition
  | goto_repetition

sequence_abbrev ::= consecutive_repetition

consecutive_repetition ::= <strong><span style="color: #FF0000">[*</span></strong> const_or_range_expression<strong><span style="color: #FF0000">]</span></strong>

non_consecutive_repetition ::= <strong><span style="color: #FF0000">[=</span></strong> const_or_range_expression<strong><span style="color: #FF0000">]</span></strong>

goto_repetition ::= <strong><span style="color: #FF0000">[-&gt;</span></strong> const_or_range_expression<strong><span style="color: #FF0000">]</span></strong>

const_or_range_expression ::=
    constant_expression
  | cycle_delay_const_range_expression

cycle_delay_const_range_expression ::=
    constant_expression : constant_expression
  | constant_expression : <strong><span style="color: #FF0000">$</span></strong></pre></div></div>
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<strong>语法17-5 — 序列复制语法(摘录自附录A)</strong></p><p class="Element10">
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一个复制需要迭代的数目既可以通过一个准确的数值来指定,也可以被要求位于一个有限的范围之内。如果指定了一个准确的数值,那么迭代的数目通过一个非负的整数常量表达式来定义。如果它被要求位于一个有限的范围之内,那么迭代的最小数目通过一个非负的整数常量表达式来定义,迭代的最大数目既可以是一个非负的整数常量表达式也可以是<span style="color: #FF0000">$</span>(它指示一个有限的但无边界的最大值)。&nbsp;</p>
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&nbsp;</p>
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如果迭代的最小数目和最大数目都通过非负的整数常量表达式来定义,那么迭代的最小数目必须小于或等于其最大数目。&nbsp;</p>
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&nbsp;</p>
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SystemVerilog提供了三种类型的复制:

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