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📄 deadzone.vhd

📁 这是一个对电机进行SVPWM调速控制的VHDL源代码程序,包括了rtl主程序和测试sim仿真程序
💻 VHD
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity deadzone is
	 Generic (
	 		count_width : integer range 1 to 8 :=3; 
	 		deadtime    : integer range 1 to 128 := 6
	 		);

    Port (
    	--
    	-- input port
    	--
    	clk		: in std_logic;
    	reset   : in std_logic;    	
    	pwm_in  : in std_logic;
    	
    	--
    	-- output port
    	--
    	pwm_top  : out std_logic;
    	pwm_bot  : out std_logic
    	
    	);
end deadzone;

architecture Behavioral of deadzone is
	--
	-- input buffer signals
	--	
	signal b_pwm_in  : std_logic;
	
	--
	-- output buffer signals
	--
	signal b_pwm_top  : std_logic;
	signal b_pwm_bot  : std_logic;
	--
	-- internal signals
	--
	signal pwm_delay	   : std_logic;
	signal rising_counter  : std_logic_vector( count_width - 1 downto 0);	
	signal rising_en	   : std_logic;
	signal falling_counter : std_logic_vector( count_width - 1 downto 0);	
	signal falling_en	   : std_logic;		
begin
	process (clk) begin
		if (rising_edge(clk)) then
			b_pwm_in <= pwm_in;
		end if;
	end process;
	
	-- top port
	process (clk) begin 
		if (rising_edge(clk)) then
			if (reset = '0') then
				pwm_delay <= b_pwm_in;
				b_pwm_top <= '0';
				rising_en <= '0';
				rising_counter <= (others => '0');
			else
				pwm_delay <= b_pwm_in;
				if (rising_en = '0') then
					b_pwm_top <= pwm_delay;
				end if;
				if (b_pwm_in = '1' and pwm_delay = '0') then
					rising_en <= '1';
				end if;
				if (rising_en = '1') then
					b_pwm_top <= '0';
					rising_counter <= rising_counter + 1;
				end if;
				if (b_pwm_in = '0' and pwm_delay = '1' and rising_en = '1') then
					rising_en <= '0';
					rising_counter <= (others => '0');
					b_pwm_top <= '0';
				end if;
				if (conv_integer(rising_counter) = deadtime) then
					rising_en <= '0';
					rising_counter <= (others => '0');
					b_pwm_top <= pwm_delay;
				end if;
			end if;
		end if;
	end process;
	
	-- bot port
	process (clk) begin 
		if (rising_edge(clk)) then
			if (reset = '0') then
				pwm_delay <= b_pwm_in;
				b_pwm_bot <= '1';
				falling_en <= '0';
				falling_counter <= (others => '0');
			else
				pwm_delay <= b_pwm_in;
				if (falling_en = '0') then
					b_pwm_bot <= pwm_delay;
				end if;
				if (b_pwm_in = '0' and pwm_delay = '1') then
					falling_en <= '1';
				end if;
				if (falling_en = '1') then
					b_pwm_bot <= '1';
					falling_counter <= falling_counter + 1;
				end if;
				if (b_pwm_in = '1' and pwm_delay = '0' and falling_en = '1') then
					falling_en <= '0';
					falling_counter <= (others => '0');
					b_pwm_bot <= '1';
				end if;
				if (conv_integer(falling_counter) = deadtime) then
					falling_en <= '0';
					falling_counter <= (others => '0');
					b_pwm_bot <= pwm_delay;
				end if;
			end if;
		end if;
	end process;
	pwm_top <= b_pwm_top;
	pwm_bot <= not b_pwm_bot;
end Behavioral;

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