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来自「在软件MAX+plus II环境中」· RPT 代码 · 共 858 行 · 第 1/5 页
RPT
858 行
- 5 - F 02 OR2 s 0 4 0 1 |MODE_CONTROL:78|~1593~2
- 8 - F 08 OR2 0 3 1 8 |MODE_CONTROL:78|:1593
- 1 - F 04 AND2 0 2 1 8 |MODE_CONTROL:78|:1601
- 1 - F 12 AND2 1 3 0 2 |MODE_CONTROL:78|:1610
- 7 - F 05 OR2 s 0 4 0 1 |MODE_CONTROL:78|~1621~1
- 5 - F 05 OR2 0 4 0 4 |MODE_CONTROL:78|:1628
- 5 - F 11 AND2 s 0 2 0 1 |MODE_CONTROL:78|~1636~1
- 4 - F 11 OR2 s 0 4 0 4 |MODE_CONTROL:78|~1647~1
- 1 - F 16 AND2 ! 0 4 0 1 |MODE_CONTROL:78|:1691
- 2 - F 16 OR2 ! 0 4 0 3 |MODE_CONTROL:78|:1692
- 4 - F 16 OR2 0 4 0 1 |MODE_CONTROL:78|:1737
- 5 - F 16 OR2 0 4 0 4 |MODE_CONTROL:78|:1738
- 6 - F 16 OR2 0 4 0 1 |MODE_CONTROL:78|:1783
- 3 - F 16 OR2 0 4 0 4 |MODE_CONTROL:78|:1784
- 8 - F 16 OR2 0 4 0 1 |MODE_CONTROL:78|:1831
- 7 - F 16 OR2 0 4 0 4 |MODE_CONTROL:78|:1832
- 5 - F 18 AND2 s 0 4 0 53 |MODE_CONTROL:78|~1842~1
- 2 - F 09 OR2 0 3 0 1 |MODE_CONTROL:78|:1849
- 5 - F 08 AND2 s 1 1 0 6 |MODE_CONTROL:78|~1858~1
- 3 - F 09 OR2 0 4 0 4 |MODE_CONTROL:78|:1858
- 7 - F 09 AND2 0 3 0 8 |MODE_CONTROL:78|:1882
- 4 - F 09 AND2 0 3 0 8 |MODE_CONTROL:78|:1905
- 5 - F 09 AND2 0 3 0 8 |MODE_CONTROL:78|:1928
- 1 - F 09 AND2 0 3 0 8 |MODE_CONTROL:78|:1950
- 3 - F 15 OR2 0 3 0 10 |MODE_CONTROL:78|:1954
- 2 - F 15 AND2 0 3 0 2 |MODE_CONTROL:78|:1965
- 2 - F 12 OR2 s ! 0 3 0 2 |MODE_CONTROL:78|~2002~1
- 7 - F 02 OR2 s ! 0 3 0 1 |MODE_CONTROL:78|~2003~1
- 4 - F 04 OR2 ! 0 3 0 11 |MODE_CONTROL:78|:2003
- 3 - F 01 AND2 s 0 2 0 8 |MODE_CONTROL:78|~2021~1
- 1 - F 11 OR2 1 3 0 264 |MODE_CONTROL:78|:2021
- 4 - F 17 OR2 s 0 4 0 3 |MODE_CONTROL:78|~2032~1
- 4 - F 02 OR2 s ! 0 3 0 1 |MODE_CONTROL:78|~2050~1
- 2 - F 02 OR2 0 4 0 8 |MODE_CONTROL:78|:2050
- 5 - C 20 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~1
- 6 - C 20 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~2
- 7 - C 20 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~3
- 3 - C 20 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~4
- 2 - C 20 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~5
- 1 - C 20 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~6
- 4 - C 20 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~7
- 8 - C 20 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~8
- 4 - C 09 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~9
- 3 - C 09 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~10
- 8 - E 07 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~11
- 3 - E 07 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~12
- 6 - C 09 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~13
- 2 - C 09 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~14
- 6 - E 07 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~15
- 4 - E 07 OR2 s ! 0 4 0 16 |MODE_CONTROL:78|~2060~16
- 7 - F 11 OR2 ! 1 3 0 24 |MODE_CONTROL:78|:2060
- 1 - F 02 OR2 0 4 0 1 |MODE_CONTROL:78|:2072
- 1 - F 08 OR2 0 4 1 8 |MODE_CONTROL:78|:2081
- 1 - F 05 AND2 0 3 1 16 |MODE_CONTROL:78|:2104
- 2 - F 11 OR2 ! 0 4 0 8 |MODE_CONTROL:78|:2146
- 2 - E 14 OR2 0 4 0 1 |MUX2_2:50|:119
- 3 - C 16 OR2 0 4 0 1 |MUX2_2:50|:125
- 8 - C 21 AND2 s 0 2 0 2 |MUX2_2:50|~126~1
- 3 - C 21 AND2 s 0 4 0 2 |MUX2_2:50|~126~2
- 5 - C 16 OR2 s 0 4 0 1 |MUX2_2:50|~126~3
- 1 - D 02 OR2 0 4 0 1 |MUX2_2:50|:131
- 7 - C 21 AND2 s 0 3 0 1 |MUX2_2:50|~132~1
- 7 - C 16 AND2 s 0 2 0 2 |MUX2_2:50|~132~2
- 1 - D 14 OR2 0 4 0 1 |MUX2_2:50|:137
- 3 - C 24 OR2 0 4 0 1 |MUX2_2:50|:143
- 2 - D 18 OR2 0 4 0 1 |MUX2_2:50|:149
- 6 - C 21 OR2 0 4 0 1 |MUX2_2:50|:155
- 5 - C 01 OR2 0 4 0 1 |MUX2_2:50|:161
- 1 - E 14 OR2 0 3 0 40 |MUX3:52|:172
- 2 - F 06 OR2 1 3 0 2 |MUX3:52|:178
- 1 - A 08 OR2 0 3 0 40 |MUX3:52|:184
- 5 - F 10 OR2 1 3 0 2 |MUX3:52|:187
- 2 - C 01 OR2 0 3 0 38 |MUX3:52|:193
- 2 - A 13 OR2 1 3 0 4 |MUX3:52|:196
- 4 - D 14 OR2 0 3 0 38 |MUX3:52|:202
- 4 - A 03 OR2 1 3 0 4 |MUX3:52|:205
- 1 - C 24 OR2 0 3 0 38 |MUX3:52|:211
- 2 - A 02 OR2 1 3 0 4 |MUX3:52|:214
- 1 - D 18 OR2 0 3 0 38 |MUX3:52|:220
- 1 - A 10 OR2 1 3 0 4 |MUX3:52|:223
- 7 - C 14 OR2 0 3 0 38 |MUX3:52|:229
- 4 - A 05 OR2 1 3 0 4 |MUX3:52|:232
- 3 - C 01 OR2 0 3 0 38 |MUX3:52|:238
- 1 - A 16 OR2 1 3 0 4 |MUX3:52|:241
- 4 - F 01 OR2 0 4 0 8 |MUX5:44|:134
- 7 - F 01 OR2 s 0 3 0 3 |MUX5:44|~145~1
- 6 - F 01 AND2 0 4 0 8 |MUX5:44|:145
- 8 - F 01 AND2 0 4 0 8 |MUX5:44|:156
- 5 - F 01 AND2 0 4 0 8 |MUX5:44|:167
- 2 - F 01 AND2 s 0 3 0 2 |MUX5:44|~178~1
- 1 - F 01 AND2 0 4 0 8 |MUX5:44|:178
- 1 - A 14 OR2 s 0 4 0 1 |MUX5:44|~377~1
- 4 - A 14 OR2 s 0 3 0 1 |MUX5:44|~377~2
- 5 - A 14 OR2 s 0 3 0 1 |MUX5:44|~377~3
- 6 - A 14 OR2 s 0 3 0 1 |MUX5:44|~377~4
- 2 - A 14 OR2 0 3 0 3 |MUX5:44|:377
- 5 - A 08 OR2 s 0 4 0 1 |MUX5:44|~395~1
- 6 - A 18 OR2 s 0 3 0 1 |MUX5:44|~395~2
- 1 - A 18 OR2 s 0 3 0 1 |MUX5:44|~395~3
- 4 - A 08 OR2 s 0 3 0 1 |MUX5:44|~395~4
- 8 - A 08 OR2 0 3 0 3 |MUX5:44|:395
- 3 - A 13 OR2 s 0 4 0 1 |MUX5:44|~413~1
- 5 - A 13 OR2 s 0 3 0 1 |MUX5:44|~413~2
- 6 - A 13 OR2 s 0 3 0 1 |MUX5:44|~413~3
- 7 - A 13 OR2 s 0 3 0 1 |MUX5:44|~413~4
- 1 - A 13 OR2 0 3 0 3 |MUX5:44|:413
- 2 - A 03 OR2 s 0 4 0 1 |MUX5:44|~431~1
- 5 - A 03 OR2 s 0 3 0 1 |MUX5:44|~431~2
- 6 - A 03 OR2 s 0 3 0 1 |MUX5:44|~431~3
- 7 - A 03 OR2 s 0 3 0 1 |MUX5:44|~431~4
- 1 - A 03 OR2 0 3 0 3 |MUX5:44|:431
- 3 - A 02 OR2 s 0 4 0 1 |MUX5:44|~449~1
- 4 - A 02 OR2 s 0 3 0 1 |MUX5:44|~449~2
- 5 - A 02 OR2 s 0 3 0 1 |MUX5:44|~449~3
- 7 - A 02 OR2 s 0 3 0 1 |MUX5:44|~449~4
- 1 - A 02 OR2 0 3 0 3 |MUX5:44|:449
- 2 - A 10 OR2 s 0 4 0 1 |MUX5:44|~467~1
- 5 - A 10 OR2 s 0 3 0 1 |MUX5:44|~467~2
- 6 - A 10 OR2 s 0 3 0 1 |MUX5:44|~467~3
- 7 - A 10 OR2 s 0 3 0 1 |MUX5:44|~467~4
- 4 - A 10 OR2 0 3 0 3 |MUX5:44|:467
- 2 - A 05 OR2 s 0 4 0 1 |MUX5:44|~485~1
- 5 - A 05 OR2 s 0 3 0 1 |MUX5:44|~485~2
- 6 - A 05 OR2 s 0 3 0 1 |MUX5:44|~485~3
- 7 - A 05 OR2 s 0 3 0 1 |MUX5:44|~485~4
- 1 - A 05 OR2 0 3 0 3 |MUX5:44|:485
- 1 - A 17 OR2 s 0 3 0 17 |MUX5:44|~503~1
- 2 - A 16 OR2 s 0 4 0 1 |MUX5:44|~503~2
- 5 - A 16 OR2 s 0 3 0 1 |MUX5:44|~503~3
- 6 - A 16 OR2 s 0 3 0 1 |MUX5:44|~503~4
- 7 - A 16 OR2 s 0 3 0 1 |MUX5:44|~503~5
- 4 - A 16 OR2 0 3 0 3 |MUX5:44|:503
- 1 - F 14 AND2 0 2 0 1 |PC:9|LPM_ADD_SUB:132|addcore:adder|:121
- 3 - F 14 AND2 0 3 0 2 |PC:9|LPM_ADD_SUB:132|addcore:adder|:125
- 3 - F 07 AND2 0 2 0 2 |PC:9|LPM_ADD_SUB:132|addcore:adder|:129
- 1 - F 03 AND2 0 2 0 2 |PC:9|LPM_ADD_SUB:132|addcore:adder|:133
- 3 - F 03 AND2 0 2 0 2 |PC:9|LPM_ADD_SUB:132|addcore:adder|:137
- 2 - F 03 AND2 0 2 0 1 |PC:9|LPM_ADD_SUB:132|addcore:adder|:141
- 3 - F 06 DFFE 0 4 0 1 |PC:9|QOUT7 (|PC:9|:20)
- 6 - F 03 DFFE 0 4 0 2 |PC:9|QOUT6 (|PC:9|:21)
- 7 - F 03 DFFE 0 4 0 2 |PC:9|QOUT5 (|PC:9|:22)
- 8 - F 03 DFFE 0 4 0 2 |PC:9|QOUT4 (|PC:9|:23)
- 4 - F 07 DFFE 0 4 0 2 |PC:9|QOUT3 (|PC:9|:24)
- 4 - F 14 DFFE 0 4 0 2 |PC:9|QOUT2 (|PC:9|:25)
- 7 - F 14 DFFE 0 4 0 3 |PC:9|QOUT1 (|PC:9|:26)
- 5 - F 14 DFFE 0 3 0 4 |PC:9|QOUT0 (|PC:9|:27)
- 5 - E 14 DFFE 0 4 0 1 |RAM:41|:11
- 1 - E 08 DFFE 0 4 0 1 |RAM:41|:13
- 8 - D 02 DFFE 0 4 0 1 |RAM:41|:15
- 6 - D 14 DFFE 0 4 0 1 |RAM:41|:17
- 7 - C 24 DFFE 0 4 0 1 |RAM:41|:19
- 5 - D 18 DFFE 0 4 0 1 |RAM:41|:21
- 4 - E 01 DFFE 0 4 0 1 |RAM:41|:23
- 6 - C 01 DFFE 0 4 0 1 |RAM:41|:25
- 2 - D 20 DFFE 0 4 0 1 |RAM:41|MEM0_7 (|RAM:41|:35)
- 4 - E 32 DFFE 0 4 0 1 |RAM:41|MEM0_6 (|RAM:41|:36)
- 4 - D 15 DFFE 0 4 0 1 |RAM:41|MEM0_5 (|RAM:41|:37)
- 1 - D 08 DFFE 0 4 0 1 |RAM:41|MEM0_4 (|RAM:41|:38)
- 3 - D 32 DFFE 0 4 0 1 |RAM:41|MEM0_3 (|RAM:41|:39)
- 4 - D 22 DFFE 0 4 0 1 |RAM:41|MEM0_2 (|RAM:41|:40)
- 4 - D 26 DFFE 0 4 0 1 |RAM:41|MEM0_1 (|RAM:41|:41)
- 1 - D 32 DFFE 0 4 0 1 |RAM:41|MEM0_0 (|RAM:41|:42)
- 3 - D 20 DFFE 0 4 0 1 |RAM:41|MEM1_7 (|RAM:41|:43)
- 5 - E 32 DFFE 0 4 0 1 |RAM:41|MEM1_6 (|RAM:41|:44)
- 5 - D 15 DFFE 0 4 0 1 |RAM:41|MEM1_5 (|RAM:41|:45)
- 2 - D 08 DFFE 0 4 0 1 |RAM:41|MEM1_4 (|RAM:41|:46)
- 4 - D 32 DFFE 0 4 0 1 |RAM:41|MEM1_3 (|RAM:41|:47)
- 5 - D 22 DFFE 0 4 0 1 |RAM:41|MEM1_2 (|RAM:41|:48)
- 6 - D 26 DFFE 0 4 0 1 |RAM:41|MEM1_1 (|RAM:41|:49)
- 2 - D 32 DFFE 0 4 0 1 |RAM:41|MEM1_0 (|⌨️ 快捷键说明
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