ch_fir.qsf

基于分布式算法的FPGA实现的FIR滤波器源码

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		CH_FIR_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE EP2C8T144C8
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name TOP_LEVEL_ENTITY CH_FIR
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:24:50  JULY 02, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 7.0
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name BSF_FILE CH_FIR.bsf
set_global_assignment -name BDF_FILE ../mac/mac.bdf
set_global_assignment -name BDF_FILE ../controller/controller.bdf
set_global_assignment -name BSF_FILE ../serial_adder4/Serial_adder4.bsf
set_global_assignment -name BDF_FILE ../input_process/input_process.bdf
set_global_assignment -name VHDL_FILE ../ptos.vhd
set_global_assignment -name VHDL_FILE ../work11/sa.vhd
set_global_assignment -name VHDL_FILE ../shiftregister/shiftregister.vhd
set_global_assignment -name VHDL_FILE ../serial_adder/serial_adde4.vhd
set_global_assignment -name VHDL_FILE ../serial_adder/serial_adder.vhd
set_global_assignment -name VHDL_FILE ../LATCH8/LATCH8.vhd
set_global_assignment -name MIF_FILE ../mac/rom.mif
set_global_assignment -name VHDL_FILE ../mac/rom.vhd
set_global_assignment -name VHDL_FILE ../FIR/shift_reg.vhd
set_global_assignment -name VHDL_FILE ../div9/div9.vhd
set_global_assignment -name VHDL_FILE ../controller/cc.vhd
set_global_assignment -name BDF_FILE CH_FIR.bdf
set_global_assignment -name VECTOR_WAVEFORM_FILE CH_FIR.vwf
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE CH_FIR.vwf