ch_fir.tan.summary

基于分布式算法的FPGA实现的FIR滤波器源码

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 5.181 ns
From           : start
To             : controller:inst3|cc:inst|present_state.s0
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 8.892 ns
From           : LATCH8:inst1|Q_TEMP[7]
To             : Q[7]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.350 ns
From           : data[6]
To             : input_process:inst|ptos:inst2|q_temP[6]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 180.05 MHz ( period = 5.554 ns )
From           : mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|ram_block1a0~porta_address_reg3
To             : mac:inst2|rom:inst1|altsyncram:altsyncram_component|altsyncram_jp61:auto_generated|q_a[9]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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