_primary.vhd

自己今年的毕业设计DDS波形发生器,有正弦波,方波,三角波,锯齿波.

library verilog;
use verilog.vl_types.all;
entity phaseadd is
    port(
        phaseadd_a      : in     vl_logic_vector(9 downto 0);
        phaseadd_b      : in     vl_logic_vector(9 downto 0);
        cin             : in     vl_logic;
        clk             : in     vl_logic;
        clr             : in     vl_logic;
        en              : in     vl_logic;
        phaseadd_out    : out    vl_logic_vector(9 downto 0)
    );
end phaseadd;