_primary.vhd

来自「自己今年的毕业设计DDS波形发生器,有正弦波,方波,三角波,锯齿波.」· VHDL 代码 · 共 14 行

library verilog;
use verilog.vl_types.all;
entity acc is
    port(
        acc_in          : in     vl_logic_vector(31 downto 0);
        cin             : in     vl_logic;
        clk             : in     vl_logic;
        clr             : in     vl_logic;
        en              : in     vl_logic;
        flag            : in     vl_logic_vector(1 downto 0);
        acc_out         : out    vl_logic_vector(31 downto 0)
    );
end acc;