_primary.vhd

来自「自己今年的毕业设计DDS波形发生器,有正弦波,方波,三角波,锯齿波.」· VHDL 代码 · 共 11 行

library verilog;
use verilog.vl_types.all;
entity ramp_rom is
    port(
        addr            : in     vl_logic_vector(7 downto 0);
        clk             : in     vl_logic;
        dout            : out    vl_logic_vector(7 downto 0);
        en              : in     vl_logic
    );
end ramp_rom;