_primary.vhd

自己今年的毕业设计DDS波形发生器,有正弦波,方波,三角波,锯齿波.

library verilog;
use verilog.vl_types.all;
entity addchange is
    port(
        chan_in         : in     vl_logic_vector(31 downto 0);
        chan_out        : out    vl_logic_vector(9 downto 0);
        clk             : in     vl_logic
    );
end addchange;