_primary.vhd

来自「自己今年的毕业设计DDS波形发生器,有正弦波,方波,三角波,锯齿波.」· VHDL 代码 · 共 10 行

library verilog;
use verilog.vl_types.all;
entity sine_convertor is
    port(
        sine_convertor_in: in     vl_logic_vector(9 downto 0);
        sine_convertor_out: out    vl_logic_vector(7 downto 0);
        sine_convertor_ctr: out    vl_logic
    );
end sine_convertor;