signal.hier_info

通信基带信号发生器的设计

|FINAL
CLK_DA <= PLL:inst4.c1
CLK_IN => PLL:inst4.inclk0
CLK_IN => STATUSCONTROL:inst.CLK
CLK_IN => FREQUENCY_DIV:inst8.CLK
CLK_IN => FREQUENCY_DIV:inst10.CLK
CLK_IN => CON_ASK:inst19.CLK
CLK_IN => FREQUENCY_DIV:inst9.CLK
OUT[0] <= DATAOUT:inst26.QOUT[0]
OUT[1] <= DATAOUT:inst26.QOUT[1]
OUT[2] <= DATAOUT:inst26.QOUT[2]
OUT[3] <= DATAOUT:inst26.QOUT[3]
OUT[4] <= DATAOUT:inst26.QOUT[4]
OUT[5] <= DATAOUT:inst26.QOUT[5]
OUT[6] <= DATAOUT:inst26.QOUT[6]
OUT[7] <= DATAOUT:inst26.QOUT[7]
OUT[8] <= DATAOUT:inst26.QOUT[8]
OUT[9] <= DATAOUT:inst26.QOUT[9]
EN => PARALLEL:inst6.EN
TXD => PARALLEL:inst6.TXD
MCU_IN[0] => PARALLEL:inst6.MCU_IN[0]
MCU_IN[1] => PARALLEL:inst6.MCU_IN[1]
MCU_IN[2] => PARALLEL:inst6.MCU_IN[2]
MCU_IN[3] => PARALLEL:inst6.MCU_IN[3]
MCU_IN[4] => PARALLEL:inst6.MCU_IN[4]
MCU_IN[5] => PARALLEL:inst6.MCU_IN[5]
MCU_IN[6] => PARALLEL:inst6.MCU_IN[6]
MCU_IN[7] => PARALLEL:inst6.MCU_IN[7]


|FINAL|PLL:inst4
inclk0 => altpll:altpll_component.inclk[0]
c0 <= altpll:altpll_component.clk[0]
c1 <= altpll:altpll_component.clk[1]


|FINAL|PLL:inst4|altpll:altpll_component
inclk[0] => pll.CLK
inclk[1] => ~NO_FANOUT~
fbin => ~NO_FANOUT~
pllena => ~NO_FANOUT~
clkswitch => ~NO_FANOUT~
areset => ~NO_FANOUT~
pfdena => ~NO_FANOUT~
clkena[0] => ~NO_FANOUT~
clkena[1] => ~NO_FANOUT~
clkena[2] => ~NO_FANOUT~
clkena[3] => ~NO_FANOUT~
clkena[4] => ~NO_FANOUT~
clkena[5] => ~NO_FANOUT~
extclkena[0] => ~NO_FANOUT~
extclkena[1] => ~NO_FANOUT~
extclkena[2] => ~NO_FANOUT~
extclkena[3] => ~NO_FANOUT~
scanclk => ~NO_FANOUT~
scanaclr => ~NO_FANOUT~
scanread => ~NO_FANOUT~
scanwrite => ~NO_FANOUT~
scandata => ~NO_FANOUT~
clk[0] <= pll.CLK
clk[1] <= pll.CLK1
clk[2] <= <UNC>
clk[3] <= <UNC>
clk[4] <= <UNC>
clk[5] <= <UNC>
extclk[0] <= <GND>
extclk[1] <= <GND>
extclk[2] <= <GND>
extclk[3] <= <GND>
clkbad[0] <= <GND>
clkbad[1] <= <GND>
enable1 <= <GND>
enable0 <= <GND>
activeclock <= <GND>
clkloss <= <GND>
locked <= <GND>
scandataout <= <GND>
scandone <= <GND>
sclkout0 <= <GND>
sclkout1 <= sclkout1~0.DB_MAX_OUTPUT_PORT_TYPE


|FINAL|DATAOUT:inst26
SEL[0] => Mux0.IN2
SEL[0] => Mux1.IN2
SEL[0] => Mux2.IN2
SEL[0] => Mux3.IN2
SEL[0] => Mux4.IN2
SEL[0] => Mux5.IN2
SEL[0] => Mux6.IN2
SEL[0] => Mux7.IN2
SEL[0] => Mux8.IN2
SEL[0] => Mux9.IN2
SEL[1] => Mux0.IN1
SEL[1] => Mux1.IN1
SEL[1] => Mux2.IN1
SEL[1] => Mux3.IN1
SEL[1] => Mux4.IN1
SEL[1] => Mux5.IN1
SEL[1] => Mux6.IN1
SEL[1] => Mux7.IN1
SEL[1] => Mux8.IN1
SEL[1] => Mux9.IN1
SEL[2] => Mux0.IN0
SEL[2] => Mux1.IN0
SEL[2] => Mux2.IN0
SEL[2] => Mux3.IN0
SEL[2] => Mux4.IN0
SEL[2] => Mux5.IN0
SEL[2] => Mux6.IN0
SEL[2] => Mux7.IN0
SEL[2] => Mux8.IN0
SEL[2] => Mux9.IN0
SIN[0] => Mux9.IN3
SIN[1] => Mux8.IN3
SIN[2] => Mux7.IN3
SIN[3] => Mux6.IN3
SIN[4] => Mux5.IN3
SIN[5] => Mux4.IN3
SIN[6] => Mux3.IN3
SIN[7] => Mux2.IN3
SIN[8] => Mux1.IN3
SIN[9] => Mux0.IN3
AM[0] => Mux9.IN4
AM[1] => Mux8.IN4
AM[2] => Mux7.IN4
AM[3] => Mux6.IN4
AM[4] => Mux5.IN4
AM[5] => Mux4.IN4
AM[6] => Mux3.IN4
AM[7] => Mux2.IN4
AM[8] => Mux1.IN4
AM[9] => Mux0.IN4
FM[0] => Mux9.IN5
FM[1] => Mux8.IN5
FM[2] => Mux7.IN5
FM[3] => Mux6.IN5
FM[4] => Mux5.IN5
FM[5] => Mux4.IN5
FM[6] => Mux3.IN5
FM[7] => Mux2.IN5
FM[8] => Mux1.IN5
FM[9] => Mux0.IN5
ASK[0] => Mux9.IN6
ASK[1] => Mux8.IN6
ASK[2] => Mux7.IN6
ASK[3] => Mux6.IN6
ASK[4] => Mux5.IN6
ASK[5] => Mux4.IN6
ASK[6] => Mux3.IN6
ASK[7] => Mux2.IN6
ASK[8] => Mux1.IN6
ASK[9] => Mux0.IN6
FSK[0] => Mux9.IN7
FSK[1] => Mux8.IN7
FSK[2] => Mux7.IN7
FSK[3] => Mux6.IN7
FSK[4] => Mux5.IN7
FSK[5] => Mux4.IN7
FSK[6] => Mux3.IN7
FSK[7] => Mux2.IN7
FSK[8] => Mux1.IN7
FSK[9] => Mux0.IN7
PSK[0] => Mux9.IN8
PSK[1] => Mux8.IN8
PSK[2] => Mux7.IN8
PSK[3] => Mux6.IN8
PSK[4] => Mux5.IN8
PSK[5] => Mux4.IN8
PSK[6] => Mux3.IN8
PSK[7] => Mux2.IN8
PSK[8] => Mux1.IN8
PSK[9] => Mux0.IN8
DIN7[0] => Mux9.IN9
DIN7[1] => Mux8.IN9
DIN7[2] => Mux7.IN9
DIN7[3] => Mux6.IN9
DIN7[4] => Mux5.IN9
DIN7[5] => Mux4.IN9
DIN7[6] => Mux3.IN9
DIN7[7] => Mux2.IN9
DIN7[8] => Mux1.IN9
DIN7[9] => Mux0.IN9
DIN8[0] => Mux9.IN10
DIN8[1] => Mux8.IN10
DIN8[2] => Mux7.IN10
DIN8[3] => Mux6.IN10
DIN8[4] => Mux5.IN10
DIN8[5] => Mux4.IN10
DIN8[6] => Mux3.IN10
DIN8[7] => Mux2.IN10
DIN8[8] => Mux1.IN10
DIN8[9] => Mux0.IN10
QOUT[0] <= Mux9.DB_MAX_OUTPUT_PORT_TYPE
QOUT[1] <= Mux8.DB_MAX_OUTPUT_PORT_TYPE
QOUT[2] <= Mux7.DB_MAX_OUTPUT_PORT_TYPE
QOUT[3] <= Mux6.DB_MAX_OUTPUT_PORT_TYPE
QOUT[4] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
QOUT[5] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
QOUT[6] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
QOUT[7] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
QOUT[8] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
QOUT[9] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE


|FINAL|lpm_add_sub0:inst20
dataa[0] => lpm_add_sub:lpm_add_sub_component.dataa[0]
dataa[1] => lpm_add_sub:lpm_add_sub_component.dataa[1]
dataa[2] => lpm_add_sub:lpm_add_sub_component.dataa[2]
dataa[3] => lpm_add_sub:lpm_add_sub_component.dataa[3]
dataa[4] => lpm_add_sub:lpm_add_sub_component.dataa[4]
dataa[5] => lpm_add_sub:lpm_add_sub_component.dataa[5]
dataa[6] => lpm_add_sub:lpm_add_sub_component.dataa[6]
dataa[7] => lpm_add_sub:lpm_add_sub_component.dataa[7]
dataa[8] => lpm_add_sub:lpm_add_sub_component.dataa[8]
dataa[9] => lpm_add_sub:lpm_add_sub_component.dataa[9]
result[0] <= lpm_add_sub:lpm_add_sub_component.result[0]
result[1] <= lpm_add_sub:lpm_add_sub_component.result[1]
result[2] <= lpm_add_sub:lpm_add_sub_component.result[2]
result[3] <= lpm_add_sub:lpm_add_sub_component.result[3]
result[4] <= lpm_add_sub:lpm_add_sub_component.result[4]
result[5] <= lpm_add_sub:lpm_add_sub_component.result[5]
result[6] <= lpm_add_sub:lpm_add_sub_component.result[6]
result[7] <= lpm_add_sub:lpm_add_sub_component.result[7]
result[8] <= lpm_add_sub:lpm_add_sub_component.result[8]
result[9] <= lpm_add_sub:lpm_add_sub_component.result[9]


|FINAL|lpm_add_sub0:inst20|lpm_add_sub:lpm_add_sub_component
dataa[0] => addcore:adder.dataa[0]
dataa[1] => addcore:adder.dataa[1]
dataa[2] => addcore:adder.dataa[2]
dataa[3] => addcore:adder.dataa[3]
dataa[4] => addcore:adder.dataa[4]
dataa[5] => addcore:adder.dataa[5]
dataa[6] => addcore:adder.dataa[6]
dataa[7] => addcore:adder.dataa[7]
dataa[8] => addcore:adder.dataa[8]
dataa[9] => addcore:adder.dataa[9]
datab[0] => addcore:adder.datab[0]
datab[1] => addcore:adder.datab[1]
datab[2] => addcore:adder.datab[2]
datab[3] => addcore:adder.datab[3]
datab[4] => addcore:adder.datab[4]
datab[5] => addcore:adder.datab[5]
datab[6] => addcore:adder.datab[6]
datab[7] => addcore:adder.datab[7]
datab[8] => addcore:adder.datab[8]
datab[9] => addcore:adder.datab[9]
cin => ~NO_FANOUT~
add_sub => ~NO_FANOUT~
clock => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clken => ~NO_FANOUT~
result[0] <= altshift:result_ext_latency_ffs.result[0]
result[1] <= altshift:result_ext_latency_ffs.result[1]
result[2] <= altshift:result_ext_latency_ffs.result[2]
result[3] <= altshift:result_ext_latency_ffs.result[3]
result[4] <= altshift:result_ext_latency_ffs.result[4]
result[5] <= altshift:result_ext_latency_ffs.result[5]
result[6] <= altshift:result_ext_latency_ffs.result[6]
result[7] <= altshift:result_ext_latency_ffs.result[7]
result[8] <= altshift:result_ext_latency_ffs.result[8]
result[9] <= altshift:result_ext_latency_ffs.result[9]
cout <= cout~0.DB_MAX_OUTPUT_PORT_TYPE
overflow <= overflow~0.DB_MAX_OUTPUT_PORT_TYPE


|FINAL|lpm_add_sub0:inst20|lpm_add_sub:lpm_add_sub_component|addcore:adder
datab[0] => datab_node[0].IN0
datab[1] => datab_node[1].IN0
datab[2] => datab_node[2].IN0
datab[3] => datab_node[3].IN0
datab[4] => datab_node[4].IN0
datab[5] => datab_node[5].IN0
datab[6] => datab_node[6].IN0
datab[7] => datab_node[7].IN0
datab[8] => datab_node[8].IN0
datab[9] => datab_node[9].IN0
cin => ~NO_FANOUT~
add_sub => cin_node.IN0
clock => ~NO_FANOUT~
aclr => ~NO_FANOUT~
clken => ~NO_FANOUT~
result[0] <= a_csnbuffer:result_node.sout[0]
result[1] <= a_csnbuffer:result_node.sout[1]
result[2] <= a_csnbuffer:result_node.sout[2]
result[3] <= a_csnbuffer:result_node.sout[3]
result[4] <= a_csnbuffer:result_node.sout[4]
result[5] <= a_csnbuffer:result_node.sout[5]
result[6] <= a_csnbuffer:result_node.sout[6]
result[7] <= a_csnbuffer:result_node.sout[7]
result[8] <= a_csnbuffer:result_node.sout[8]
result[9] <= a_csnbuffer:result_node.sout[9]
cout <= a_csnbuffer:cout_node.sout[0]
unreg_result[0] <= unreg_res_node[0].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[1] <= unreg_res_node[1].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[2] <= unreg_res_node[2].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[3] <= unreg_res_node[3].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[4] <= unreg_res_node[4].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[5] <= unreg_res_node[5].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[6] <= unreg_res_node[6].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[7] <= unreg_res_node[7].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[8] <= unreg_res_node[8].DB_MAX_OUTPUT_PORT_TYPE
unreg_result[9] <= unreg_res_node[9].DB_MAX_OUTPUT_PORT_TYPE
unreg_cout <= unreg_cout_node.DB_MAX_OUTPUT_PORT_TYPE
overflow <= a_csnbuffer:oflow_node.sout[0]
bg_out <= <GND>
bp_out <= <GND>


|FINAL|lpm_add_sub0:inst20|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:oflow_node
sin[0] => sout_node[0].DATAIN
sin[1] => sout_node[1].DATAIN
sin[2] => sout_node[2].DATAIN
sin[3] => sout_node[3].DATAIN
sin[4] => sout_node[4].DATAIN
sin[5] => sout_node[5].DATAIN
sin[6] => sout_node[6].DATAIN
sin[7] => sout_node[7].DATAIN
sin[8] => sout_node[8].DATAIN
sin[9] => sout_node[9].DATAIN
cin[0] => cout[0]~9.IN0
cin[1] => cout[1]~8.IN0
cin[2] => cout[2]~7.IN0
cin[3] => cout[3]~6.IN0
cin[4] => cout[4]~5.IN0
cin[5] => cout[5]~4.IN0
cin[6] => cout[6]~3.IN0
cin[7] => cout[7]~2.IN0
cin[8] => cout[8]~1.IN0
cin[9] => cout[9]~0.IN0
clk => ~NO_FANOUT~
clrn => ~NO_FANOUT~
ena => ~NO_FANOUT~
sout[0] <= sout_node[0].DB_MAX_OUTPUT_PORT_TYPE
sout[1] <= sout_node[1].DB_MAX_OUTPUT_PORT_TYPE
sout[2] <= sout_node[2].DB_MAX_OUTPUT_PORT_TYPE
sout[3] <= sout_node[3].DB_MAX_OUTPUT_PORT_TYPE
sout[4] <= sout_node[4].DB_MAX_OUTPUT_PORT_TYPE
sout[5] <= sout_node[5].DB_MAX_OUTPUT_PORT_TYPE
sout[6] <= sout_node[6].DB_MAX_OUTPUT_PORT_TYPE
sout[7] <= sout_node[7].DB_MAX_OUTPUT_PORT_TYPE
sout[8] <= sout_node[8].DB_MAX_OUTPUT_PORT_TYPE
sout[9] <= sout_node[9].DB_MAX_OUTPUT_PORT_TYPE
cout[0] <= cout[0]~9.DB_MAX_OUTPUT_PORT_TYPE
cout[1] <= cout[1]~8.DB_MAX_OUTPUT_PORT_TYPE
cout[2] <= cout[2]~7.DB_MAX_OUTPUT_PORT_TYPE
cout[3] <= cout[3]~6.DB_MAX_OUTPUT_PORT_TYPE
cout[4] <= cout[4]~5.DB_MAX_OUTPUT_PORT_TYPE
cout[5] <= cout[5]~4.DB_MAX_OUTPUT_PORT_TYPE
cout[6] <= cout[6]~3.DB_MAX_OUTPUT_PORT_TYPE
cout[7] <= cout[7]~2.DB_MAX_OUTPUT_PORT_TYPE
cout[8] <= cout[8]~1.DB_MAX_OUTPUT_PORT_TYPE
cout[9] <= cout[9]~0.DB_MAX_OUTPUT_PORT_TYPE


|FINAL|lpm_add_sub0:inst20|lpm_add_sub:lpm_add_sub_component|addcore:adder|a_csnbuffer:result_node
sin[0] => cs_buffer[0].SUM_IN
sin[1] => cs_buffer[1].SUM_IN
sin[2] => cs_buffer[2].SUM_IN
sin[3] => cs_buffer[3].SUM_IN
sin[4] => cs_buffer[4].SUM_IN
sin[5] => cs_buffer[5].SUM_IN
sin[6] => cs_buffer[6].SUM_IN
sin[7] => cs_buffer[7].SUM_IN
sin[8] => cs_buffer[8].SUM_IN
sin[9] => cs_buffer[9].SUM_IN
cin[0] => cs_buffer[0].CIN
cin[1] => cs_buffer[1].CIN
cin[2] => cs_buffer[2].CIN
cin[3] => cs_buffer[3].CIN
cin[4] => cs_buffer[4].CIN
cin[5] => cs_buffer[5].CIN
cin[6] => cs_buffer[6].CIN
cin[7] => cs_buffer[7].CIN
cin[8] => cs_buffer[8].CIN
cin[9] => cs_buffer[9].CIN
clk => ~NO_FANOUT~
clrn => ~NO_FANOUT~
ena => ~NO_FANOUT~
sout[0] <= cs_buffer[0].DB_MAX_OUTPUT_PORT_TYPE
sout[1] <= cs_buffer[1].DB_MAX_OUTPUT_PORT_TYPE
sout[2] <= cs_buffer[2].DB_MAX_OUTPUT_PORT_TYPE
sout[3] <= cs_buffer[3].DB_MAX_OUTPUT_PORT_TYPE
sout[4] <= cs_buffer[4].DB_MAX_OUTPUT_PORT_TYPE
sout[5] <= cs_buffer[5].DB_MAX_OUTPUT_PORT_TYPE
sout[6] <= cs_buffer[6].DB_MAX_OUTPUT_PORT_TYPE
sout[7] <= cs_buffer[7].DB_MAX_OUTPUT_PORT_TYPE
sout[8] <= cs_buffer[8].DB_MAX_OUTPUT_PORT_TYPE
sout[9] <= cs_buffer[9].DB_MAX_OUTPUT_PORT_TYPE
cout[0] <= cs_buffer[0].DB_MAX_OUTPUT_PORT_TYPE
cout[1] <= cs_buffer[1].DB_MAX_OUTPUT_PORT_TYPE
cout[2] <= cs_buffer[2].DB_MAX_OUTPUT_PORT_TYPE
cout[3] <= cs_buffer[3].DB_MAX_OUTPUT_PORT_TYPE
cout[4] <= cs_buffer[4].DB_MAX_OUTPUT_PORT_TYPE
cout[5] <= cs_buffer[5].DB_MAX_OUTPUT_PORT_TYPE
cout[6] <= cs_buffer[6].DB_MAX_OUTPUT_PORT_TYPE
cout[7] <= cs_buffer[7].DB_MAX_OUTPUT_PORT_TYPE