mux_ocb.tdf

通信基带信号发生器的设计

--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" LPM_SIZE=4 LPM_WIDTH=77 LPM_WIDTHS=2 data result sel
--VERSION_BEGIN 6.0 cbx_lpm_mux 2006:01:09:11:16:16:SJ cbx_mgl 2006:04:14:11:14:36:SJ  VERSION_END


--  Copyright (C) 1991-2006 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.



--synthesis_resources = lut 154 
SUBDESIGN mux_ocb
( 
	data[307..0]	:	input;
	result[76..0]	:	output;
	sel[1..0]	:	input;
) 
VARIABLE 
	result_node[76..0]	: WIRE;
	sel_node[1..0]	: WIRE;
	w_data2605w[3..0]	: WIRE;
	w_data2635w[3..0]	: WIRE;
	w_data2660w[3..0]	: WIRE;
	w_data2685w[3..0]	: WIRE;
	w_data2710w[3..0]	: WIRE;
	w_data2735w[3..0]	: WIRE;
	w_data2760w[3..0]	: WIRE;
	w_data2785w[3..0]	: WIRE;
	w_data2810w[3..0]	: WIRE;
	w_data2835w[3..0]	: WIRE;
	w_data2860w[3..0]	: WIRE;
	w_data2885w[3..0]	: WIRE;
	w_data2910w[3..0]	: WIRE;
	w_data2935w[3..0]	: WIRE;
	w_data2960w[3..0]	: WIRE;
	w_data2985w[3..0]	: WIRE;
	w_data3010w[3..0]	: WIRE;
	w_data3035w[3..0]	: WIRE;
	w_data3060w[3..0]	: WIRE;
	w_data3085w[3..0]	: WIRE;
	w_data3110w[3..0]	: WIRE;
	w_data3135w[3..0]	: WIRE;
	w_data3160w[3..0]	: WIRE;
	w_data3185w[3..0]	: WIRE;
	w_data3210w[3..0]	: WIRE;
	w_data3235w[3..0]	: WIRE;
	w_data3260w[3..0]	: WIRE;
	w_data3285w[3..0]	: WIRE;
	w_data3310w[3..0]	: WIRE;
	w_data3335w[3..0]	: WIRE;
	w_data3360w[3..0]	: WIRE;
	w_data3385w[3..0]	: WIRE;
	w_data3410w[3..0]	: WIRE;
	w_data3435w[3..0]	: WIRE;
	w_data3460w[3..0]	: WIRE;
	w_data3485w[3..0]	: WIRE;
	w_data3510w[3..0]	: WIRE;
	w_data3535w[3..0]	: WIRE;
	w_data3560w[3..0]	: WIRE;
	w_data3585w[3..0]	: WIRE;
	w_data3610w[3..0]	: WIRE;
	w_data3635w[3..0]	: WIRE;
	w_data3660w[3..0]	: WIRE;
	w_data3685w[3..0]	: WIRE;
	w_data3710w[3..0]	: WIRE;
	w_data3735w[3..0]	: WIRE;
	w_data3760w[3..0]	: WIRE;
	w_data3785w[3..0]	: WIRE;
	w_data3810w[3..0]	: WIRE;
	w_data3835w[3..0]	: WIRE;
	w_data3860w[3..0]	: WIRE;
	w_data3885w[3..0]	: WIRE;
	w_data3910w[3..0]	: WIRE;
	w_data3935w[3..0]	: WIRE;
	w_data3960w[3..0]	: WIRE;
	w_data3985w[3..0]	: WIRE;
	w_data4010w[3..0]	: WIRE;
	w_data4035w[3..0]	: WIRE;
	w_data4060w[3..0]	: WIRE;
	w_data4085w[3..0]	: WIRE;
	w_data4110w[3..0]	: WIRE;
	w_data4135w[3..0]	: WIRE;
	w_data4160w[3..0]	: WIRE;
	w_data4185w[3..0]	: WIRE;
	w_data4210w[3..0]	: WIRE;
	w_data4235w[3..0]	: WIRE;
	w_data4260w[3..0]	: WIRE;
	w_data4285w[3..0]	: WIRE;
	w_data4310w[3..0]	: WIRE;
	w_data4335w[3..0]	: WIRE;
	w_data4360w[3..0]	: WIRE;
	w_data4385w[3..0]	: WIRE;
	w_data4410w[3..0]	: WIRE;
	w_data4435w[3..0]	: WIRE;
	w_data4460w[3..0]	: WIRE;
	w_data4485w[3..0]	: WIRE;
	w_data4510w[3..0]	: WIRE;
	w_result2617w	: WIRE;
	w_result2647w	: WIRE;
	w_result2672w	: WIRE;
	w_result2697w	: WIRE;
	w_result2722w	: WIRE;
	w_result2747w	: WIRE;
	w_result2772w	: WIRE;
	w_result2797w	: WIRE;
	w_result2822w	: WIRE;