con_psk.vhd

来自「通信基带信号发生器的设计」· VHDL 代码 · 共 26 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY CON_PSK IS 
PORT(CLK,QIN:IN STD_LOGIC;
     PHA_OUT:OUT STD_LOGIC_VECTOR(15 DOWNTO 0)
	);
END ENTITY;

ARCHITECTURE BEHAV OF CON_PSK IS
BEGIN


PROCESS(CLK)
BEGIN
IF CLK'EVENT AND CLK='1' THEN
   IF QIN='1' THEN
      PHA_OUT<="0000000000000000";   --不反向
   ELSE
      PHA_OUT<="0111111111111111";   --反向加180度
   END IF;
END IF;
END PROCESS;

END;