dataout.vhd

来自「通信基带信号发生器的设计」· VHDL 代码 · 共 28 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;

ENTITY DATAOUT IS
  
PORT (     
      SEL:IN STD_LOGIC_VECTOR(2 DOWNTO 0);
      SIN,AM,FM,ASK,FSK,PSK,DIN7,DIN8:IN STD_LOGIC_VECTOR(9 DOWNTO 0);
      QOUT: OUT STD_LOGIC_VECTOR(9 DOWNTO 0)
      );
END ENTITY;

ARCHITECTURE BEHAVE OF DATAOUT IS

BEGIN

WITH SEL SELECT
 QOUT<= SIN  WHEN "000",
        AM   WHEN "001",
        FM   WHEN "010",
        ASK  WHEN "011",
		PSK  WHEN "100",
		FSK  WHEN "101",
		DIN7 WHEN "110",
		DIN8 WHEN "111";
END;