dds.map.eqn

DDs直接数字频率合成器的源代码

--PB8L21 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[9]~121
--operation mode is arithmetic

PB8L21 = CARRY(RB1_constant_update_reg[25] & !F1_ADDRLOCK[25] & !PB8L19 # !RB1_constant_update_reg[25] & (!PB8L19 # !F1_ADDRLOCK[25]));


--PB8_sout_node[10] is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[10]
--operation mode is arithmetic

PB8_sout_node[10]_carry_eqn = PB8L21;
PB8_sout_node[10]_lut_out = RB1_constant_update_reg[26] $ F1_ADDRLOCK[26] $ !PB8_sout_node[10]_carry_eqn;
PB8_sout_node[10] = DFFEAS(PB8_sout_node[10]_lut_out, SB1__clk0, VCC, , , , , , );

--PB8L23 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[10]~125
--operation mode is arithmetic

PB8L23 = CARRY(RB1_constant_update_reg[26] & (F1_ADDRLOCK[26] # !PB8L21) # !RB1_constant_update_reg[26] & F1_ADDRLOCK[26] & !PB8L21);


--PB8_sout_node[11] is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[11]
--operation mode is arithmetic

PB8_sout_node[11]_carry_eqn = PB8L23;
PB8_sout_node[11]_lut_out = RB1_constant_update_reg[27] $ F1_ADDRLOCK[27] $ PB8_sout_node[11]_carry_eqn;
PB8_sout_node[11] = DFFEAS(PB8_sout_node[11]_lut_out, SB1__clk0, VCC, , , , , , );

--PB8L25 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[11]~129
--operation mode is arithmetic

PB8L25 = CARRY(RB1_constant_update_reg[27] & !F1_ADDRLOCK[27] & !PB8L23 # !RB1_constant_update_reg[27] & (!PB8L23 # !F1_ADDRLOCK[27]));


--PB8_sout_node[12] is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[12]
--operation mode is arithmetic

PB8_sout_node[12]_carry_eqn = PB8L25;
PB8_sout_node[12]_lut_out = RB1_constant_update_reg[28] $ F1_ADDRLOCK[28] $ !PB8_sout_node[12]_carry_eqn;
PB8_sout_node[12] = DFFEAS(PB8_sout_node[12]_lut_out, SB1__clk0, VCC, , , , , , );

--PB8L27 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[12]~133
--operation mode is arithmetic

PB8L27 = CARRY(RB1_constant_update_reg[28] & (F1_ADDRLOCK[28] # !PB8L25) # !RB1_constant_update_reg[28] & F1_ADDRLOCK[28] & !PB8L25);


--PB8_sout_node[13] is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[13]
--operation mode is arithmetic

PB8_sout_node[13]_carry_eqn = PB8L27;
PB8_sout_node[13]_lut_out = RB1_constant_update_reg[29] $ F1_ADDRLOCK[29] $ PB8_sout_node[13]_carry_eqn;
PB8_sout_node[13] = DFFEAS(PB8_sout_node[13]_lut_out, SB1__clk0, VCC, , , , , , );

--PB8L29 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[13]~137
--operation mode is arithmetic

PB8L29 = CARRY(RB1_constant_update_reg[29] & !F1_ADDRLOCK[29] & !PB8L27 # !RB1_constant_update_reg[29] & (!PB8L27 # !F1_ADDRLOCK[29]));


--PB8_sout_node[14] is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[14]
--operation mode is arithmetic

PB8_sout_node[14]_carry_eqn = PB8L29;
PB8_sout_node[14]_lut_out = RB1_constant_update_reg[30] $ F1_ADDRLOCK[30] $ !PB8_sout_node[14]_carry_eqn;
PB8_sout_node[14] = DFFEAS(PB8_sout_node[14]_lut_out, SB1__clk0, VCC, , , , , , );

--PB8L31 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[14]~141
--operation mode is arithmetic

PB8L31 = CARRY(RB1_constant_update_reg[30] & (F1_ADDRLOCK[30] # !PB8L29) # !RB1_constant_update_reg[30] & F1_ADDRLOCK[30] & !PB8L29);


--PB8_sout_node[15] is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[15]
--operation mode is normal

PB8_sout_node[15]_carry_eqn = PB8L31;
PB8_sout_node[15]_lut_out = RB1_constant_update_reg[31] $ F1_ADDROUT[8] $ PB8_sout_node[15]_carry_eqn;
PB8_sout_node[15] = DFFEAS(PB8_sout_node[15]_lut_out, SB1__clk0, VCC, , , , , , );


--VB1_state[4] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4]
--operation mode is normal

VB1_state[4] = AMPP_FUNCTION(A1L5, VB1_state[7], VB1_state[3], VB1_state[4], VCC, A1L7);


--VB1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]
--operation mode is normal

VB1_state[3] = AMPP_FUNCTION(A1L5, VB1_state[2], A1L7, VCC);


--H1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1
--operation mode is normal

H1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L5, Q5_dffs[1], A1L30, A1L31, Q5_dffs[0], VB1_state[0], VB1_state[12]);


--RB1L72 is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|name_gen~33
--operation mode is normal

RB1L72 = AMPP_FUNCTION(VB1_state[4], VB1_state[3], H1_jtag_debug_mode_usr1);


--TB8_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]
--operation mode is normal

TB8_Q[0] = AMPP_FUNCTION(A1L5, TB3_Q[8], altera_internal_jtag, H1_CLRN_SIGNAL, H1L20);


--L1_WORD_SR[0] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|sld_rom_sr:\constant_logic_gen:name_gen:info_rom_sr|WORD_SR[0]
--operation mode is normal

L1_WORD_SR[0] = AMPP_FUNCTION(A1L5, L1_WORD_SR[1], L1L16, VB1_state[4], L3_clear_signal, VCC, L1L14);


--TB5_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1]
--operation mode is normal

TB5_Q[1] = AMPP_FUNCTION(A1L5, TB7_Q[1], TB3_Q[1], TB2_Q[0], H1_CLRN_SIGNAL, H1L21);


--TB5_Q[2] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[2]
--operation mode is normal

TB5_Q[2] = AMPP_FUNCTION(A1L5, TB7_Q[2], TB3_Q[2], TB2_Q[0], H1_CLRN_SIGNAL, H1L21);


--RB1L75 is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|process2~42
--operation mode is normal

RB1L75 = AMPP_FUNCTION(TB5_Q[1], TB5_Q[2]);


--RB1_bypass_reg_out is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|bypass_reg_out
--operation mode is normal

RB1_bypass_reg_out = AMPP_FUNCTION(A1L5, altera_internal_jtag, RB1_bypass_reg_out, H1L30, H1_CLRN_SIGNAL);


--TB5_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0]
--operation mode is normal

TB5_Q[0] = AMPP_FUNCTION(A1L5, TB7_Q[0], TB3_Q[0], TB2_Q[0], H1_CLRN_SIGNAL, H1L21);


--H1L9 is sld_hub:sld_hub_inst|hub_tdo~807
--operation mode is normal

H1L9 = AMPP_FUNCTION(L1_WORD_SR[0], RB1L75, RB1_bypass_reg_out, TB5_Q[0]);


--RB1_constant_shift_reg[0] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_shift_reg[0]
--operation mode is normal

RB1_constant_shift_reg[0] = AMPP_FUNCTION(A1L5, RB1_constant_shift_reg[1], RB1_constant_update_reg[0], VB1_state[4], RB1L76, VCC, RB1L19);


--H1L10 is sld_hub:sld_hub_inst|hub_tdo~808
--operation mode is normal

H1L10 = AMPP_FUNCTION(RB1_constant_shift_reg[0], TB5_Q[1], TB5_Q[2], TB5_Q[0]);


--H1L11 is sld_hub:sld_hub_inst|hub_tdo~809
--operation mode is normal

H1L11 = AMPP_FUNCTION(RB1L72, TB8_Q[0], H1L9, H1L10);


--TB3_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]
--operation mode is normal

TB3_Q[0] = AMPP_FUNCTION(A1L5, M1L3, RB1_is_in_use_reg, TB3_Q[1], H1L19, H1_CLRN_SIGNAL, VB1_state[4], TB3L4);


--VB1L18 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13
--operation mode is normal

VB1L18 = AMPP_FUNCTION(VB1_state[4], VB1_state[3]);


--H1L12 is sld_hub:sld_hub_inst|hub_tdo~810
--operation mode is normal

H1L12 = AMPP_FUNCTION(TB3_Q[0], H1_jtag_debug_mode_usr1, VB1L18, H1_hub_tdo);


--TB9_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]
--operation mode is normal

TB9_Q[0] = AMPP_FUNCTION(A1L5, altera_internal_jtag, TB3_Q[8], VCC, H1L20);


--L3_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]
--operation mode is normal

L3_WORD_SR[0] = AMPP_FUNCTION(A1L5, L3L20, L1L17, L3L21, L3L22, VCC, L3L16);


--H1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG
--operation mode is normal

H1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L5, altera_internal_jtag, VB1_state[4], VCC);


--WB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[0]
--operation mode is normal

WB1_dffe1a[0] = AMPP_FUNCTION(A1L5, H1L28, TB3_Q[1], TB3_Q[2], TB3_Q[3], H1_CLRN_SIGNAL, H1L3);


--H1L13 is sld_hub:sld_hub_inst|hub_tdo~811
--operation mode is normal

H1L13 = AMPP_FUNCTION(L3_WORD_SR[0], H1_HUB_BYPASS_REG, WB1_dffe1a[0]);


--H1L14 is sld_hub:sld_hub_inst|hub_tdo~812
--operation mode is normal

H1L14 = AMPP_FUNCTION(H1L12, RB1L72, TB9_Q[0], H1L13);


--B1_bypass_reg_out is sld_signaltap:auto_signaltap_0|bypass_reg_out
--operation mode is normal

B1_bypass_reg_out = AMPP_FUNCTION(A1L5, altera_internal_jtag, B1_bypass_reg_out, H1L31, H1_jtag_debug_mode, !B1_reset_all);


--TB4_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[5]
--operation mode is normal

TB4_Q[5] = AMPP_FUNCTION(A1L5, TB6_Q[5], TB3_Q[5], TB2_Q[0], H1_CLRN_SIGNAL, H1L23);


--TB4_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[3]
--operation mode is normal

TB4_Q[3] = AMPP_FUNCTION(A1L5, TB6_Q[3], TB3_Q[3], TB2_Q[0], H1_CLRN_SIGNAL, H1L23);


--TB4_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[4]
--operation mode is normal

TB4_Q[4] = AMPP_FUNCTION(A1L5, TB6_Q[4], TB3_Q[4], TB2_Q[0], H1_CLRN_SIGNAL, H1L23);


--H1L15 is sld_hub:sld_hub_inst|hub_tdo~813
--operation mode is normal

H1L15 = AMPP_FUNCTION(B1_bypass_reg_out, TB4_Q[5], TB4_Q[3], TB4_Q[4]);


--Q1_dffs[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]
--operation mode is normal

Q1_dffs[0] = AMPP_FUNCTION(A1L5, Q1_dffs[1], !B1_reset_all, M1_trigger_setup_ena);


--L2_WORD_SR[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[0]
--operation mode is normal

L2_WORD_SR[0] = AMPP_FUNCTION(A1L5, L2_WORD_SR[1], L2L16, VB1_state[4], L3_clear_signal, VCC, L2L15);


--H1L16 is sld_hub:sld_hub_inst|hub_tdo~814
--operation mode is normal

H1L16 = AMPP_FUNCTION(TB4_Q[5], TB4_Q[3], Q1_dffs[0], L2_WORD_SR[0]);


--Q4_dffs[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]
--operation mode is normal

Q4_dffs[0] = AMPP_FUNCTION(A1L5, Q4_dffs[1], N1_is_max_write_address_ff, B1L28, !B1_reset_all);


--H1L17 is sld_hub:sld_hub_inst|hub_tdo~815
--operation mode is normal

H1L17 = AMPP_FUNCTION(H1L15, H1L16, TB4_Q[4], Q4_dffs[0]);


--TB8_Q[1] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1]
--operation mode is normal

TB8_Q[1] = AMPP_FUNCTION(A1L5, altera_internal_jtag, TB3_Q[8], H1_CLRN_SIGNAL, H1L20);


--H1L18 is sld_hub:sld_hub_inst|hub_tdo~816
--operation mode is normal

H1L18 = AMPP_FUNCTION(TB8_Q[1], VB1_state[4], VB1_state[3], H1_jtag_debug_mode_usr1);


--VB1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]
--operation mode is normal

VB1_state[8] = AMPP_FUNCTION(A1L5, VB1_state[5], VB1_state[7], VCC, !A1L7);


--SB1__clk0 is DPLL:inst4|altpll:altpll_component|_clk0
SB1__clk0 = PLL.CLK0(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(clk), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA());


--RB1_constant_update_reg[23] is lpm_constant0:inst2|lpm_constant0_lpm_constant_iia:lpm_constant0_lpm_constant_iia_component|sld_mod_ram_rom:mgl_prim1|constant_update_reg[23]
--operation mode is normal

RB1_constant_update_reg[23] = AMPP_FUNCTION(A1L5, RB1_constant_shift_reg[23], VCC, RB1L73);


--PB8_sout_node[6] is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[6]
--operation mode is arithmetic

PB8_sout_node[6]_carry_eqn = PB8L13;
PB8_sout_node[6]_lut_out = RB1_constant_update_reg[22] $ F1_ADDRLOCK[22] $ !PB8_sout_node[6]_carry_eqn;
PB8_sout_node[6] = DFFEAS(PB8_sout_node[6]_lut_out, SB1__clk0, VCC, , , , , , );

--PB8L15 is lpm_add_pharse:inst1|lpm_add_sub:lpm_add_sub_component|addcore:adder1_0[1]|a_csnbuffer:result_node|sout_node[6]~149
--operation mode is arithmetic