pipemult.qsf

郑亚民版的可编程逻辑器件开发软件quatus ii里的一些例程

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		pipemult_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:58:02  DECEMBER 19, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VERILOG_FILE mult.v
set_global_assignment -name BDF_FILE pipemult.bdf
set_global_assignment -name VERILOG_FILE ram.v

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY pipemult

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C6F256C6
set_global_assignment -name ROUTING_BACK_ANNOTATION_MODE NORMAL
set_global_assignment -name ROUTING_BACK_ANNOTATION_FILE pipemult.rcf

# ----------------------
# start ENTITY(pipemult)


	# -------------------------------------
	# start LOGICLOCK_REGION(pipemult_lock)

		# LogicLock Region Assignments
		# ============================
		set_global_assignment -name LL_ORIGIN X18_Y1 -section_id pipemult_lock
		set_global_assignment -name LL_HEIGHT 4 -section_id pipemult_lock
		set_global_assignment -name LL_WIDTH 5 -section_id pipemult_lock
		set_global_assignment -name LL_STATE LOCKED -section_id pipemult_lock
		set_global_assignment -name LL_AUTO_SIZE OFF -section_id pipemult_lock
		set_global_assignment -name LL_RESERVED OFF -section_id pipemult_lock
		set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id pipemult_lock
		set_global_assignment -name LL_SOFT OFF -section_id pipemult_lock
		set_global_assignment -name LL_MEMBER_OF pipemult_lock -section_id pipemult_lock
		set_instance_assignment -name LL_NODE_LOCATION LAB_X22_Y2 -to "mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[1]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~171" -section_id pipemult_lock
		set_instance_assignment -name LL_NODE_LOCATION LAB_X22_Y2 -to "mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[1]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~173" -section_id pipemult_lock
		set_instance_assignment -name LL_NODE_LOCATION LAB_X20_Y3 -to "mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[2]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~176" -section_id pipemult_lock
		set_instance_assignment -name LL_NODE_LOCATION LAB_X20_Y3 -to "mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[2]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~178" -section_id pipemult_lock
		set_instance_assignment -name LL_NODE_LOCATION LAB_X20_Y4 -to "mult:inst|lpm_mult:lpm_mult_component|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[3]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~186" -section_id pipemult_lock