ddfsdemo.sim.qmsg

郑亚民版的可编程逻辑器件开发软件quatus ii里的一些例程

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator Quartus II " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Jun 11 23:26:20 2006 " "Info: Processing started: Sun Jun 11 23:26:20 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --read_settings_files=on --write_settings_files=off DDFSDemo -c DDFSDemo " "Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off DDFSDemo -c DDFSDemo" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_WREN " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_WREN\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_DATA\[7\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_DATA\[7\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[0\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[0\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[1\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[1\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[2\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[2\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[3\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[3\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[4\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[4\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[5\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[5\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[6\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[6\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[7\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[7\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[8\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[8\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_ADD\[9\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_ADD\[9\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_DATA\[6\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_DATA\[6\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_DATA\[5\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_DATA\[5\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_DATA\[4\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_DATA\[4\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_DATA\[3\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_DATA\[3\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_DATA\[2\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_DATA\[2\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_DATA\[1\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_DATA\[1\]\"" {  } {  } 0}
{ "Warning" "WSIM_NO_CHANNEL_FOUND" "\|DDFSDemo\|LUT_DATA\[0\] " "Warning: Can't find signal in vector source file for input pin \"\|DDFSDemo\|LUT_DATA\[0\]\"" {  } {  } 0}
{ "Info" "ISDB_YGR_YGR_PLL_LOCKED" "\|DDFSDemo\|PLL:inst\|altpll:altpll_component\|_clk0 113.32 ns " "Info: PLL \"\|DDFSDemo\|PLL:inst\|altpll:altpll_component\|_clk0\" was locked to input clock at time 113.32 ns" {  } {  } 0}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" "     24.00 % " "Info: Simulation coverage is      24.00 %" {  } {  } 0}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "3803 " "Info: Number of transitions in simulation is 3803" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 19 s Quartus II " "Info: Quartus II Simulator was successful. 0 errors, 19 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Jun 11 23:26:20 2006 " "Info: Processing ended: Sun Jun 11 23:26:20 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}