📄 clock.vhd
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LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;
USE ieee.std_logic_unsigned.all;
entity clock is
port( en,rt,set,set1 : in std_logic;
clk1,cp1,cp2,cp3 : in std_logic;
q1,q2,q3: out std_logic_vector(7 downto 0);
bell: out std_logic);
end clock ;
ARCHITECTURE clock OF clock IS
signal qa1:std_logic_vector(3 downto 0);
signal qb1:std_logic_vector(3 downto 0);
signal qa2:std_logic_vector(3 downto 0);
signal qb2:std_logic_vector(3 downto 0);
signal qa3:std_logic_vector(3 downto 0);
signal qb3:std_logic_vector(3 downto 0);
signal ua1:std_logic_vector(3 downto 0);
signal ub1:std_logic_vector(3 downto 0);
signal ua2:std_logic_vector(3 downto 0);
signal ub2:std_logic_vector(3 downto 0);
signal ua3:std_logic_vector(3 downto 0);
signal ub3:std_logic_vector(3 downto 0);
signal sa1:std_logic_vector(3 downto 0);
signal sb1:std_logic_vector(3 downto 0);
signal sa2:std_logic_vector(3 downto 0);
signal sb2:std_logic_vector(3 downto 0);
signal sa3:std_logic_vector(3 downto 0);
signal sb3:std_logic_vector(3 downto 0);
signal clk,clk2,s,q5,k,k1:std_logic;
signal bell1,bell2:std_logic;
signal q:std_logic_vector(0 to 1);
begin
process(set) --调整日期或定时选择
begin
if set'event and set='1' then
if q<1 then s<='0'; k<='1';q<=q+1;
elsif q<2 then q<=q+1;s<='1';k<='0';
elsif q<3 then q<="00";s<='0';k<='0';
else q<=q+1;
end if;
end if;
end process;
process(set1,k,clk,rt)
begin
if rt='1' then qA1<="0000";QB1<="0000";qA2<="0000";QB2<="0000";qA3<="0000";QB3<="0000";
else
if clk'event and clk='1' then
if set1='1' then --校时
if (cp1='1') then
if qb1<5 then
if qa1<9 then qa1<=qa1+1;qb1<=qb1;
else
qa1<="0000";qb1<=qb1+1; end if;
else if (qa1<9) then
qa1<=qa1+1;qb1<=qb1;
else qa1<="0000";qb1<="0000";end if;end if;
else qa1<=qa1;end if;
if (cp2='1') then
if qb2<5 then
if qa2<9 then qa2<=qa2+1;qb2<=qb2;
else
qa2<="0000";qb2<=qb2+1; end if;
else if (qa2<9) then
qa2<=qa2+1;qb2<=qb2;
else qa2<="0000";qb2<="0000";end if;end if;
else qa2<=qa2;end if;
if (cp3='1') then
if qb3<2 then
if qa3<9 then qa3<=qa3+1;qb3<=qb3;
else
qa3<="0000";qb3<=qb3+1; end if;
else if (qa3<3) then
qa3<=qa3+1;qb3<=qb3;
else qa3<="0000";qb3<="0000";end if;end if;
else qa3<=qa3;end if;
else
qa1<=qa1+1; --计时
if (qa1>=6) and(qa1<=9) then qa1<=qa1+1;k1<='0';
if(qa1>=9) then qa1<="0000";QB1<=QB1+1;
if (qa1>=9 AND qb1>=5) then qb1<="0000";qa2<=qa2+1;
if(qa2>=9) then qa2<="0000";QB2<=QB2+1;
if (qa2>=9 AND qb2>=5) then qb2<="0000";qa3<="0000";k1<='1';--整点报时
if qb3<2 then
if(qa3<9) then qa3<=qa3+1;QB3<=QB3;
else qb3<=qb3+1;qa3<="0000";
end if;
elsif qa3<3 then qa3<=qa3+1;qb3<=qb3;
else qA3<="0000";QB3<="0000";sa1<=sa1+1;sa2<=sa2+1; --星期，日期进位
if sa1>=6 then sa1<="0000";
if sb2<3 then
if(sa2<9) then sa2<=sa2+1;sB2<=sB2;
else sb2<=sb2+1;sa2<="0000";
end if;
elsif sa2<1 then sa2<=sa2+1;sb2<=sb2;
else sA2<="0000";sB2<="0000";sa3<=sa3+1;
if sb3<1 then
if sa3<9 then sa3<=sa3+1;sb3<=sb3;
else
sa3<="0000";sb3<=sb3+1; end if;
elsif (sa3<2) then
sa3<=sa3+1;sb3<=sb3;
else sa3<="0000";sb3<="0000";end if;end if;
end if;
end if ;end if;end if;end if;
end if;end if;end if;
if k='1' then --星期或日期调整
if (cp1='1') then
if sa1<6 then sa1<=sa1+1; else sa1<="0000";end if;end if;
if (cp2='1') then
if sb2<3 then
if sa2<9 then sa2<=sa2+1;sb2<=sb2;
else
sa2<="0000";sb2<=sb2+1; end if;
else if (sa2<1) then
sa2<=sa2+1;sb2<=sb2;
else sa2<="0000";sb2<="0000";end if;end if;
else sa2<=sa2;end if;
if (cp3='1') then
if sb3<1 then
if sa3<9 then sa3<=sa3+1;sb3<=sb3;
else
sa3<="0000";sb3<=sb3+1; end if;
else if (sa3<2) then
sa3<=sa3+1;sb3<=sb3;
else sa3<="0000";sb3<="0000";end if;end if;
else sa3<=sa3;end if;
end if;end if;end if;
end process;
process (s,en,clk) --定时调整
begin
if clk'event and clk='1' then
if s='1' then
if (cp1='1') then
if ub1<5 then
if ua1<9 then ua1<=ua1+1;ub1<=ub1;
else
ua1<="0000";ub1<=ub1+1; end if;
else if (ua1<9) then
ua1<=ua1+1;ub1<=ub1;
else ua1<="0000";ub1<="0000";end if;end if;
else ua1<=ua1;end if;
if ( cp2='1') then
if ub2<5 then
if ua2<9 then ua2<=ua2+1;ub2<=ub2;
else
ua2<="0000";ub2<=ub2+1; end if;
else if (ua2<9) then
ua2<=ua2+1;ub2<=ub2;
else ua2<="0000";ub2<="0000";end if;end if;
else ua2<=ua2;end if;
if (cp3='1') then
if ub3<2 then
if ua3<9 then ua3<=ua3+1;ub3<=ub3;
else
ua3<="0000";ub3<=ub3+1; end if;
else if (ua3<3) then
ua3<=ua3+1;ub3<=ub3;
else ua3<="0000";ub3<="0000";end if;end if;
else ua3<=ua3;end if;
end if;
if en='0' then q5<='0'; --闹铃开关
elsif (ub1=qb1 and ua1=qa1 and ub2=qb2 and ua2=qa2 and ub3=qb3 and ua3=qa3 ) then
q5<='1';
end if;
end if;
end process;
process(clk2,q5) --闹铃铃声
variable q4:integer range 0 to 10600;
variable f:std_logic;
begin
if clk2'event and clk2='1' then
if q5='1' then
if q4<1200 then f:='1';q4:=q4+1;
elsif q4<1600 then f:='0';q4:=q4+1;
elsif q4<2800 then f:='1';q4:=q4+1;
elsif q4<3200 then f:='0';q4:=q4+1;
elsif q4<4400 then f:='1';q4:=q4+1;
elsif q4<5200 then f:='0';q4:=q4+1;
elsif q4<8400 then f:='1';q4:=q4+1;
elsif q4<8840 then f:='0';q4:=q4+1;
elsif q4<9800 then f:='1';q4:=q4+1;
elsif q4<10600 then f:='0';q4:=q4+1;
else f:='0';q4:=0;q4:=q4+1;
end if;
else f:='0';
end if;
end if;
bell2<=f ;
end process;
process(clk2,k1)
variable f:std_logic;
begin
if clk2'event and clk2='1' then
if k1='1' then f:=qa1(0);
else f:='0';end if;end if;
bell1<=f;
end process;
process(clk1) --分频
variable cnt:integer range 0 to 5999999;
variable ff:std_logic;
begin
if clk1'event and clk1='1' then
if cnt<5999999 then
cnt:=cnt+1;
else
cnt:=0;ff:=not ff;
end if;
end if;
clk<=ff;
end process;
process(clk1)
variable cnt:integer range 0 to 5999999;
variable ff:std_logic;
begin
if clk1'event and clk1='1' then
if cnt<1459 then
cnt:=cnt+1;
else
cnt:=0;ff:=not ff;
end if;
end if;
clk2<=ff;
end process;process(s,k)
begin
if s='1' then --显示选择
q1(7 downto 4)<=ub1;q1(3 downto 0)<=ua1 ;q2(7 downto 4)<=ub2 ;q2(3 downto 0)<=ua2;q3(7 downto 4)<=ub3;q3(3 downto 0)<=ua3;
elsif k='1' then
q1(7 downto 4)<=sb1;q1(3 downto 0)<=sa1 ;q2(7 downto 4)<=sb2 ;q2(3 downto 0)<=sa2;q3(7 downto 4)<=sb3;q3(3 downto 0)<=sa3;
else q1(7 downto 4)<=qb1;q1(3 downto 0)<=qa1 ;q2(7 downto 4)<=qb2 ;q2(3 downto 0)<=qa2;q3(7 downto 4)<=qb3;q3(3 downto 0)<=qa3;
end if;
end process;
sb1<="0000";
bell<=(bell2 or bell1) and clk2 ;
end ;
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