alu8.rpt

简单的CPU设计数字系统实验

08:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
09:      5/24( 20%)     1/4( 25%)      0/4(  0%)       0/4(  0%)
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24:      1/24(  4%)     0/4(  0%)      0/4(  0%)       0/4(  0%)
EA:      0/24(  0%)     0/4(  0%)      0/4(  0%)       0/4(  0%)


Device-Specific Information:        d:\maxplus2\cpu_design\cpu_module\alu8.rpt
alu8

** CLOCK SIGNALS **

Type     Fan-out       Name
INPUT        8         clk
LCELL        8         :42
LCELL        8         :43
LCELL        8         :44
LCELL        8         :45
LCELL        8         :46
LCELL        8         :47


Device-Specific Information:        d:\maxplus2\cpu_design\cpu_module\alu8.rpt
alu8

** CLEAR SIGNALS **

Type     Fan-out       Name
INPUT        8         clr


Device-Specific Information:        d:\maxplus2\cpu_design\cpu_module\alu8.rpt
alu8

** EQUATIONS **

ALU_BUS  : INPUT;
clk      : INPUT;
clr      : INPUT;
encdu    : INPUT;
LDDR1    : INPUT;
LDDR2    : INPUT;
LDR0     : INPUT;
LDR1     : INPUT;
LDR2     : INPUT;
LDR3     : INPUT;
R0_BUS   : INPUT;
R1_BUS   : INPUT;
R2_BUS   : INPUT;
R3_BUS   : INPUT;
SW_BUS   : INPUT;
S0       : INPUT;
S1       : INPUT;
S2       : INPUT;
t2       : INPUT;
t3       : INPUT;

-- Node name is 'CN4' 
-- Equation name is 'CN4', type is output 
CN4      =  _LC3_C17;

-- Node name is 'D0' 
-- Equation name is 'D0', type is bidir 
D0       = TRI(_LC8_A6,  _LC4_A4);

-- Node name is 'D1' 
-- Equation name is 'D1', type is bidir 
D1       = TRI(_LC7_A9,  _LC4_A4);

-- Node name is 'D2' 
-- Equation name is 'D2', type is bidir 
D2       = TRI(_LC3_A11,  _LC4_A4);

-- Node name is 'D3' 
-- Equation name is 'D3', type is bidir 
D3       = TRI(_LC5_C13,  _LC4_A4);

-- Node name is 'D4' 
-- Equation name is 'D4', type is bidir 
D4       = TRI(_LC1_C8,  _LC4_A4);

-- Node name is 'D5' 
-- Equation name is 'D5', type is bidir 
D5       = TRI(_LC8_C6,  _LC4_A4);

-- Node name is 'D6' 
-- Equation name is 'D6', type is bidir 
D6       = TRI(_LC1_A4,  _LC4_A4);

-- Node name is 'D7' 
-- Equation name is 'D7', type is bidir 
D7       = TRI(_LC6_C16,  _LC4_A4);

-- Node name is 'IN0' 
-- Equation name is 'IN0', type is output 
IN0      =  _LC7_C15;

-- Node name is 'IN1' 
-- Equation name is 'IN1', type is output 
IN1      =  _LC2_C15;

-- Node name is 'IN2' 
-- Equation name is 'IN2', type is output 
IN2      =  _LC1_C15;

-- Node name is 'IN3' 
-- Equation name is 'IN3', type is output 
IN3      =  _LC1_C24;

-- Node name is 'IN4' 
-- Equation name is 'IN4', type is output 
IN4      =  _LC6_C24;

-- Node name is 'IN5' 
-- Equation name is 'IN5', type is output 
IN5      =  _LC2_C24;

-- Node name is 'IN6' 
-- Equation name is 'IN6', type is output 
IN6      =  _LC3_C24;

-- Node name is 'IN7' 
-- Equation name is 'IN7', type is output 
IN7      =  _LC5_C24;

-- Node name is '|alu:1|LPM_ADD_SUB:5|addcore:adder|pcarry0' from file "addcore.tdf" line 308, column 64
-- Equation name is '_LC4_C4', type is buried 
_LC4_C4  = LCELL( _EQ001);
  _EQ001 =  _LC1_A1 &  _LC3_A1
         #  _LC3_A1 & !S2
         # !_LC1_A1 & !S2;

-- Node name is '|alu:1|LPM_ADD_SUB:5|addcore:adder|pcarry1' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC6_C4', type is buried 
_LC6_C4  = LCELL( _EQ002);
  _EQ002 =  _LC2_A7 &  _LC4_C4
         #  _LC4_C4 & !_LC6_A12 & !S2
         #  _LC4_C4 &  _LC6_A12 &  S2
         #  _LC2_A7 & !_LC6_A12 & !S2
         #  _LC2_A7 &  _LC6_A12 &  S2;

-- Node name is '|alu:1|LPM_ADD_SUB:5|addcore:adder|pcarry2' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC8_C4', type is buried 
_LC8_C4  = LCELL( _EQ003);
  _EQ003 =  _LC2_A8 &  _LC6_C4
         # !_LC3_A12 &  _LC6_C4 & !S2
         #  _LC3_A12 &  _LC6_C4 &  S2
         #  _LC2_A8 & !_LC3_A12 & !S2
         #  _LC2_A8 &  _LC3_A12 &  S2;

-- Node name is '|alu:1|LPM_ADD_SUB:5|addcore:adder|pcarry3' from file "addcore.tdf" line 312, column 40
-- Equation name is '_LC5_C4', type is buried 
_LC5_C4  = LCELL( _EQ004);
  _EQ004 = !_LC4_A1 &  _LC8_C4 & !S2
         #  _LC4_A1 &  _LC8_C4 &  S2
         #  _LC6_A1 &  _LC8_C4
         # !_LC4_A1 &  _LC6_A1 & !S2
         #  _LC4_A1 &  _LC6_A1 &  S2;

-- Node name is '