xx.fit

简单的CPU设计数字系统实验

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 06/25/2007 21:35:00      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "xx"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "CLK"                          : INPUT_PIN  = 1      ;
    "GW0"                          : OUTPUT_PIN = 27     ;
    "GW1"                          : OUTPUT_PIN = 60     ;
    "GW2"                          : OUTPUT_PIN = 59     ;
    "SW0"                          : OUTPUT_PIN = 58     ;
    "SW1"                          : OUTPUT_PIN = 61     ;
    "SW2"                          : OUTPUT_PIN = 80     ;
    "~38~1"                        : LOCATION   = LC5_C24;
    "~52~1"                        : LOCATION   = LC7_C24;
    "|7474:33|:9"                  : LOCATION   = LC6_C24;  -- |7474:33|1Q
    "|7474:33|:10"                 : LOCATION   = LC1_C24;  -- |7474:33|2Q
    "|7474:34|:9"                  : LOCATION   = LC3_C24;  -- |7474:34|1Q
    "|7474:34|:10"                 : LOCATION   = LC8_C24;  -- |7474:34|2Q
    "|7474:35|:9"                  : LOCATION   = LC2_C24;  -- |7474:35|1Q
    "|7474:35|:10"                 : LOCATION   = LC4_C24;  -- |7474:35|2Q

END;

INTERNAL_INFO "xx"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4->LC6_C24,->LC1_C24,->LC3_C24,->LC8_C24,->LC2_C24,->LC4_C24|";
    LC6_C24 : LORAX = "1:MSW6R2C22,G82R2->OH6R2P58|";
    LC1_C24 : LORAX = "1:MSW0R2C23,G36R2->OH8R2P27|";
    LC3_C24 : LORAX = "1:MSW3R2C22,V11C22->OV0C22P80|";
    LC8_C24 : LORAX = "1:MSW4R2C22,HHR44R2->OH4R2P59|";
    LC2_C24 : LORAX = "1:MSW2R2C22,HHR0R2->OH2R2P61|";
    LC4_C24 : LORAX = "1:MSW3R2C23,HHR10R2->OH3R2P60|";
	LC5_C24 : LORAX2 = "X, LC6_C24, LC2_C24, LC4_C24";
	LC7_C24 : LORAX2 = "X, LC8_C24, LC1_C24, LC3_C24";
	LC6_C24 : LORAX2 = "LC1_C24, LC3_C24, LC8_C24, LC5_C24";
	LC1_C24 : LORAX2 = "LC1_C24, LC3_C24, LC8_C24, LC5_C24";
	LC3_C24 : LORAX2 = "LC5_C24, LC8_C24, LC3_C24, LC1_C24";
	LC8_C24 : LORAX2 = "LC6_C24, LC2_C24, LC7_C24, LC4_C24";
	LC2_C24 : LORAX2 = "LC6_C24, LC4_C24, LC2_C24, LC7_C24";
	LC4_C24 : LORAX2 = "X, LC4_C24, LC7_C24, LC2_C24";
END;