time.fit.eqn

来自「数字秒表的设计」· EQN 代码 · 共 1,479 行 · 第 1/3 页

B1L4 = B1_cnt[17] $ (B1L4_carry_eqn);

--B1L5 is clkgen:inst|add~293 at LC_X26_Y9_N8
--operation mode is arithmetic

B1L5_cout_0 = !B1L8 # !B1_cnt[17];
B1L5 = CARRY(B1L5_cout_0);

--B1L6 is clkgen:inst|add~293COUT1_396 at LC_X26_Y9_N8
--operation mode is arithmetic

B1L6_cout_1 = !B1L9 # !B1_cnt[17];
B1L6 = CARRY(B1L6_cout_1);


--B1L97 is clkgen:inst|reduce_nor~116 at LC_X27_Y9_N5
--operation mode is normal

B1L97 = B1_cnt[17] & B1_cnt[16] & B1_cnt[15];


--B1L08 is clkgen:inst|reduce_nor~117 at LC_X27_Y9_N1
--operation mode is normal

B1L08 = B1_cnt[14] # !B1_cnt[18] # !B1L97 # !B1L67;


--B1_cnt[3] is clkgen:inst|cnt[3] at LC_X26_Y10_N0
--operation mode is normal

B1_cnt[3]_lut_out = GND;
B1_cnt[3] = DFFEAS(B1_cnt[3]_lut_out, GLOBAL(clk), VCC, , , B1L24, , , VCC);


--B1L18 is clkgen:inst|reduce_nor~118 at LC_X27_Y9_N6
--operation mode is normal

B1_cnt[7]_qfbk = B1_cnt[7];
B1L18 = B1_cnt[7]_qfbk # B1_cnt[3] # !B1_cnt[5] # !B1_cnt[8];

--B1_cnt[7] is clkgen:inst|cnt[7] at LC_X27_Y9_N6
--operation mode is normal

B1_cnt[7] = DFFEAS(B1L18, GLOBAL(clk), VCC, , , B1L22, , , VCC);


--B1L87 is clkgen:inst|LessThan~257 at LC_X27_Y10_N3
--operation mode is normal

B1_cnt[4]_qfbk = B1_cnt[4];
B1L87 = !B1_cnt[4]_qfbk & !B1_cnt[6];

--B1_cnt[4] is clkgen:inst|cnt[4] at LC_X27_Y10_N3
--operation mode is normal

B1_cnt[4] = DFFEAS(B1L87, GLOBAL(clk), VCC, , , B1L91, , , VCC);


--B1L28 is clkgen:inst|reduce_nor~119 at LC_X27_Y9_N9
--operation mode is normal

B1_cnt[12]_qfbk = B1_cnt[12];
B1L28 = B1_cnt[12]_qfbk # B1L18 # !B1_cnt[13] # !B1L87;

--B1_cnt[12] is clkgen:inst|cnt[12] at LC_X27_Y9_N9
--operation mode is normal

B1_cnt[12] = DFFEAS(B1L28, GLOBAL(clk), VCC, , , B1L63, , , VCC);


--B1_cnt[1] is clkgen:inst|cnt[1] at LC_X27_Y10_N1
--operation mode is normal

B1_cnt[1]_lut_out = B1L74;
B1_cnt[1] = DFFEAS(B1_cnt[1]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1_cnt[0] is clkgen:inst|cnt[0] at LC_X27_Y10_N8
--operation mode is normal

B1_cnt[0]_lut_out = B1L05 & (B1L08 # B1L28 # B1L38);
B1_cnt[0] = DFFEAS(B1_cnt[0]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1L38 is clkgen:inst|reduce_nor~120 at LC_X27_Y10_N2
--operation mode is normal

B1_cnt[2]_qfbk = B1_cnt[2];
B1L38 = B1_cnt[0] # B1_cnt[2]_qfbk # B1_cnt[1];

--B1_cnt[2] is clkgen:inst|cnt[2] at LC_X27_Y10_N2
--operation mode is normal

B1_cnt[2] = DFFEAS(B1L38, GLOBAL(clk), VCC, , , B1L44, , , VCC);


--B1L7 is clkgen:inst|add~296 at LC_X26_Y9_N7
--operation mode is arithmetic

B1L7_carry_eqn = (!B1L04 & B1L11) # (B1L04 & B1L21);
B1L7 = B1_cnt[16] $ (!B1L7_carry_eqn);

--B1L8 is clkgen:inst|add~298 at LC_X26_Y9_N7
--operation mode is arithmetic

B1L8_cout_0 = B1_cnt[16] & (!B1L11);
B1L8 = CARRY(B1L8_cout_0);

--B1L9 is clkgen:inst|add~298COUT1_395 at LC_X26_Y9_N7
--operation mode is arithmetic

B1L9_cout_1 = B1_cnt[16] & (!B1L21);
B1L9 = CARRY(B1L9_cout_1);


--B1L01 is clkgen:inst|add~301 at LC_X26_Y9_N6
--operation mode is arithmetic

B1L01_carry_eqn = (!B1L04 & B1L2) # (B1L04 & B1L3);
B1L01 = B1_cnt[15] $ B1L01_carry_eqn;

--B1L11 is clkgen:inst|add~303 at LC_X26_Y9_N6
--operation mode is arithmetic

B1L11_cout_0 = !B1L2 # !B1_cnt[15];
B1L11 = CARRY(B1L11_cout_0);

--B1L21 is clkgen:inst|add~303COUT1_394 at LC_X26_Y9_N6
--operation mode is arithmetic

B1L21_cout_1 = !B1L3 # !B1_cnt[15];
B1L21 = CARRY(B1L21_cout_1);


--B1L31 is clkgen:inst|add~306 at LC_X26_Y10_N6
--operation mode is arithmetic

B1L31_carry_eqn = (!B1L34 & B1L02) # (B1L34 & B1L12);
B1L31 = B1_cnt[5] $ B1L31_carry_eqn;

--B1L41 is clkgen:inst|add~308 at LC_X26_Y10_N6
--operation mode is arithmetic

B1L41_cout_0 = !B1L02 # !B1_cnt[5];
B1L41 = CARRY(B1L41_cout_0);

--B1L51 is clkgen:inst|add~308COUT1_386 at LC_X26_Y10_N6
--operation mode is arithmetic

B1L51_cout_1 = !B1L12 # !B1_cnt[5];
B1L51 = CARRY(B1L51_cout_1);


--B1L61 is clkgen:inst|add~311 at LC_X26_Y10_N7
--operation mode is arithmetic

B1L61_carry_eqn = (!B1L34 & B1L41) # (B1L34 & B1L51);
B1L61 = B1_cnt[6] $ (!B1L61_carry_eqn);

--B1L71 is clkgen:inst|add~313 at LC_X26_Y10_N7
--operation mode is arithmetic

B1L71_cout_0 = B1_cnt[6] & (!B1L41);
B1L71 = CARRY(B1L71_cout_0);

--B1L81 is clkgen:inst|add~313COUT1_387 at LC_X26_Y10_N7
--operation mode is arithmetic

B1L81_cout_1 = B1_cnt[6] & (!B1L51);
B1L81 = CARRY(B1L81_cout_1);


--B1L91 is clkgen:inst|add~316 at LC_X26_Y10_N5
--operation mode is arithmetic

B1L91_carry_eqn = B1L34;
B1L91 = B1_cnt[4] $ (!B1L91_carry_eqn);

--B1L02 is clkgen:inst|add~318 at LC_X26_Y10_N5
--operation mode is arithmetic

B1L02_cout_0 = B1_cnt[4] & (!B1L34);
B1L02 = CARRY(B1L02_cout_0);

--B1L12 is clkgen:inst|add~318COUT1_385 at LC_X26_Y10_N5
--operation mode is arithmetic

B1L12_cout_1 = B1_cnt[4] & (!B1L34);
B1L12 = CARRY(B1L12_cout_1);


--B1L22 is clkgen:inst|add~321 at LC_X26_Y10_N8
--operation mode is arithmetic

B1L22_carry_eqn = (!B1L34 & B1L71) # (B1L34 & B1L81);
B1L22 = B1_cnt[7] $ B1L22_carry_eqn;

--B1L32 is clkgen:inst|add~323 at LC_X26_Y10_N8
--operation mode is arithmetic

B1L32_cout_0 = !B1L71 # !B1_cnt[7];
B1L32 = CARRY(B1L32_cout_0);

--B1L42 is clkgen:inst|add~323COUT1_388 at LC_X26_Y10_N8
--operation mode is arithmetic

B1L42_cout_1 = !B1L81 # !B1_cnt[7];
B1L42 = CARRY(B1L42_cout_1);


--B1L52 is clkgen:inst|add~326 at LC_X26_Y9_N2
--operation mode is arithmetic

B1L52_carry_eqn = (!B1L53 & B1L92) # (B1L53 & B1L03);
B1L52 = B1_cnt[11] $ (B1L52_carry_eqn);

--B1L62 is clkgen:inst|add~328 at LC_X26_Y9_N2
--operation mode is arithmetic

B1L62_cout_0 = !B1L92 # !B1_cnt[11];
B1L62 = CARRY(B1L62_cout_0);

--B1L72 is clkgen:inst|add~328COUT1_391 at LC_X26_Y9_N2
--operation mode is arithmetic

B1L72_cout_1 = !B1L03 # !B1_cnt[11];
B1L72 = CARRY(B1L72_cout_1);


--B1L82 is clkgen:inst|add~331 at LC_X26_Y9_N1
--operation mode is arithmetic

B1L82_carry_eqn = (!B1L53 & B1L23) # (B1L53 & B1L33);
B1L82 = B1_cnt[10] $ !B1L82_carry_eqn;

--B1L92 is clkgen:inst|add~333 at LC_X26_Y9_N1
--operation mode is arithmetic

B1L92_cout_0 = B1_cnt[10] & !B1L23;
B1L92 = CARRY(B1L92_cout_0);

--B1L03 is clkgen:inst|add~333COUT1_390 at LC_X26_Y9_N1
--operation mode is arithmetic

B1L03_cout_1 = B1_cnt[10] & !B1L33;
B1L03 = CARRY(B1L03_cout_1);


--B1L13 is clkgen:inst|add~336 at LC_X26_Y9_N0
--operation mode is arithmetic

B1L13_carry_eqn = B1L53;
B1L13 = B1_cnt[9] $ B1L13_carry_eqn;

--B1L23 is clkgen:inst|add~338 at LC_X26_Y9_N0
--operation mode is arithmetic

B1L23_cout_0 = !B1L53 # !B1_cnt[9];
B1L23 = CARRY(B1L23_cout_0);

--B1L33 is clkgen:inst|add~338COUT1_389 at LC_X26_Y9_N0
--operation mode is arithmetic

B1L33_cout_1 = !B1L53 # !B1_cnt[9];
B1L33 = CARRY(B1L33_cout_1);


--B1L43 is clkgen:inst|add~341 at LC_X26_Y10_N9
--operation mode is arithmetic

B1L43_carry_eqn = (!B1L34 & B1L32) # (B1L34 & B1L42);
B1L43 = B1_cnt[8] $ !B1L43_carry_eqn;

--B1L53 is clkgen:inst|add~343 at LC_X26_Y10_N9
--operation mode is arithmetic

B1L53 = CARRY(B1_cnt[8] & !B1L42);


--B1L63 is clkgen:inst|add~346 at LC_X26_Y9_N3
--operation mode is arithmetic

B1L63_carry_eqn = (!B1L53 & B1L62) # (B1L53 & B1L72);
B1L63 = B1_cnt[12] $ !B1L63_carry_eqn;

--B1L73 is clkgen:inst|add~348 at LC_X26_Y9_N3
--operation mode is arithmetic

B1L73_cout_0 = B1_cnt[12] & !B1L62;
B1L73 = CARRY(B1L73_cout_0);

--B1L83 is clkgen:inst|add~348COUT1_392 at LC_X26_Y9_N3
--operation mode is arithmetic

B1L83_cout_1 = B1_cnt[12] & !B1L72;
B1L83 = CARRY(B1L83_cout_1);


--B1L93 is clkgen:inst|add~351 at LC_X26_Y9_N4
--operation mode is arithmetic

B1L93_carry_eqn = (!B1L53 & B1L73) # (B1L53 & B1L83);
B1L93 = B1_cnt[13] $ B1L93_carry_eqn;

--B1L04 is clkgen:inst|add~353 at LC_X26_Y9_N4
--operation mode is arithmetic

B1L04 = CARRY(!B1L83 # !B1_cnt[13]);


--B1L14 is clkgen:inst|add~356 at LC_X26_Y9_N9
--operation mode is normal

B1L14_carry_eqn = (!B1L04 & B1L5) # (B1L04 & B1L6);
B1L14 = B1L14_carry_eqn $ !B1_cnt[18];


--B1L24 is clkgen:inst|add~361 at LC_X26_Y10_N4
--operation mode is arithmetic

B1L24 = B1_cnt[3] $ B1L54;

--B1L34 is clkgen:inst|add~363 at LC_X26_Y10_N4
--operation mode is arithmetic

B1L34 = CARRY(!B1L64 # !B1_cnt[3]);


--B1L44 is clkgen:inst|add~366 at LC_X26_Y10_N3
--operation mode is arithmetic

B1L44 = B1_cnt[2] $ (!B1L84);

--B1L54 is clkgen:inst|add~368 at LC_X26_Y10_N3
--operation mode is arithmetic

B1L54_cout_0 = B1_cnt[2] & (!B1L84);
B1L54 = CARRY(B1L54_cout_0);

--B1L64 is clkgen:inst|add~368COUT1_384 at LC_X26_Y10_N3
--operation mode is arithmetic

B1L64_cout_1 = B1_cnt[2] & (!B1L94);
B1L64 = CARRY(B1L64_cout_1);


--B1L74 is clkgen:inst|add~371 at LC_X26_Y10_N2
--operation mode is arithmetic

B1L74 = B1_cnt[1] $ (B1L15);

--B1L84 is clkgen:inst|add~373 at LC_X26_Y10_N2
--operation mode is arithmetic

B1L84_cout_0 = !B1L15 # !B1_cnt[1];
B1L84 = CARRY(B1L84_cout_0);

--B1L94 is clkgen:inst|add~373COUT1_383 at LC_X26_Y10_N2
--operation mode is arithmetic

B1L94_cout_1 = !B1L25 # !B1_cnt[1];
B1L94 = CARRY(B1L94_cout_1);


--B1L05 is clkgen:inst|add~376 at LC_X26_Y10_N1
--operation mode is arithmetic

B1L05 = !B1_cnt[0];

--B1L15 is clkgen:inst|add~378 at LC_X26_Y10_N1
--operation mode is arithmetic

B1L15_cout_0 = B1_cnt[0];
B1L15 = CARRY(B1L15_cout_0);

--B1L25 is clkgen:inst|add~378COUT1_382 at LC_X26_Y10_N1
--operation mode is arithmetic

B1L25_cout_1 = B1_cnt[0];
B1L25 = CARRY(B1L25_cout_1);


--D1L21 is xianshi:inst7|dout[0]~635 at LC_X13_Y12_N6
--operation mode is normal

D1L21 = D1L73 & D1_qq[1] & D1L63 & D1_qq[2];


--D1L31 is xianshi:inst7|dout[0]~636 at LC_X12_Y14_N5
--operation mode is normal

D1L31 = D1L6 # !D1_qq[17] & (D1L23 # !D1_qq[16]);


--D1L84 is xianshi:inst7|LessThan~1727 at LC_X11_Y14_N7
--operation mode is normal

D1L84 = D1_qq[12] & D1_qq[11] & (D1L52 # D1_qq[9]);


--D1L52 is xianshi:inst7|LessThan~1687 at LC_X11_Y14_N9
--operation mode is normal

D1L52 = D1_qq[10] # D1L62 & D1_qq[7] & D1_qq[8];


--D1L62 is xianshi:inst7|LessThan~1690 at LC_X11_Y14_N8
--operation mode is normal

D1L62 = D1_qq[6] # D1_qq[5] # D1_qq[4] & D1_qq[3];


--clk is clk at PIN_28
--operation mode is input

clk = INPUT();


--clr is clr at PIN_49
--operation mode is input

clr = INPUT();


--ena is ena at PIN_50
--operation mode is input

ena = INPUT();


--seg[6] is seg[6] at PIN_1
--operation mode is output

seg[6] = OUTPUT(E1L7);


--seg[5] is seg[5] at PIN_180
--operation mode is output

seg[5] = OUTPUT(!E1L6);


--seg[4] is seg[4] at PIN_179
--operation mode is output

seg[4] = OUTPUT(!E1L5);


--seg[3] is seg[3] at PIN_178
--operation mode is output

seg[3] = OUTPUT(!E1L4);


--seg[2] is seg[2] at PIN_177
--operation mode is output

seg[2] = OUTPUT(!E1L3);


--seg[1] is seg[1] at PIN_176
--operation mode is output

seg[1] = OUTPUT(!E1L2);


--seg[0] is seg[0] at PIN_175
--operation mode is output

seg[0] = OUTPUT(!E1L1);


--sel[2] is sel[2] at PIN_5
--operation mode is output

sel[2] = OUTPUT(D1_w1[2]);


--sel[1] is sel[1] at PIN_4
--operation mode is output

sel[1] = OUTPUT(D1_w1[1]);


--sel[0] is sel[0] at PIN_3
--operation mode is output

sel[0] = OUTPUT(D1_w1[0]);