time.map.eqn

来自「数字秒表的设计」· EQN 代码 · 共 1,287 行 · 第 1/2 页

--operation mode is normal

D1L22 = D1L3 & (D1L12) # !D1L3 & (D1L12 & (C5_cqi[2]) # !D1L12 & C6_cqi[2]);


--C1_cqi[2] is cnt:inst1|cqi[2]
--operation mode is normal

C1_cqi[2]_lut_out = !C1_cqi[3] & (C1_cqi[2] $ (C1_cqi[0] & C1_cqi[1]));
C1_cqi[2] = DFFEAS(C1_cqi[2]_lut_out, B1_clk_scan, clr, , ena, , , , );


--C2_cqi[3] is cnt:inst2|cqi[3]
--operation mode is normal

C2_cqi[3]_lut_out = C2_cqi[3] & !C2_cqi[0] & !C2_cqi[1] & !C2_cqi[2] # !C2_cqi[3] & C2_cqi[0] & C2_cqi[1] & C2_cqi[2];
C2_cqi[3] = DFFEAS(C2_cqi[3]_lut_out, C1L6, clr, , ena, , , , );


--C3_cqi[3] is cnt:inst3|cqi[3]
--operation mode is normal

C3_cqi[3]_lut_out = C3_cqi[3] & !C3_cqi[0] & !C3_cqi[1] & !C3_cqi[2] # !C3_cqi[3] & C3_cqi[0] & C3_cqi[1] & C3_cqi[2];
C3_cqi[3] = DFFEAS(C3_cqi[3]_lut_out, C2L6, clr, , ena, , , , );


--D1L32 is xianshi:inst7|dout~633
--operation mode is normal

D1L32 = !D1L3 & (D1L6 # D1L7 # D1L8);


--C5_cqi[3] is cnt:inst5|cqi[3]
--operation mode is normal

C5_cqi[3]_lut_out = C5_cqi[3] & !C5_cqi[0] & !C5_cqi[1] & !C5_cqi[2] # !C5_cqi[3] & C5_cqi[0] & C5_cqi[1] & C5_cqi[2];
C5_cqi[3] = DFFEAS(C5_cqi[3]_lut_out, C4L5, clr, , ena, , , , );


--D1L42 is xianshi:inst7|dout~634
--operation mode is normal

D1L42 = D1L31 & (D1L32 & (C5_cqi[3]) # !D1L32 & C3_cqi[3]) # !D1L31 & (D1L32);


--C1_cqi[3] is cnt:inst1|cqi[3]
--operation mode is normal

C1_cqi[3]_lut_out = C1_cqi[3] & !C1_cqi[0] & !C1_cqi[1] & !C1_cqi[2] # !C1_cqi[3] & C1_cqi[0] & C1_cqi[1] & C1_cqi[2];
C1_cqi[3] = DFFEAS(C1_cqi[3]_lut_out, B1_clk_scan, clr, , ena, , , , );


--D1L74 is xianshi:inst7|LessThan~1726
--operation mode is normal

D1L74 = D1_qq[15] & (D1_qq[14] # D1L14);


--D1L98 is xianshi:inst7|w1~919
--operation mode is normal

D1L98 = D1_qq[16] & !D1L23 & (D1L33 # !D1L5);


--D1L09 is xianshi:inst7|w1~920
--operation mode is normal

D1L09 = D1_qq[14] & !D1_qq[15] & !D1L54 # !D1_qq[14] & D1_qq[15] & (!D1L14);


--C1L6 is cnt:inst1|reduce_nor~0
--operation mode is normal

C1L6 = !C1_cqi[0] & !C1_cqi[1] & !C1_cqi[2] & !C1_cqi[3];


--C5L6 is cnt:inst5|reduce_nor~0
--operation mode is normal

C5L6 = !C5_cqi[0] & !C5_cqi[1] & !C5_cqi[2] & !C5_cqi[3];


--D1_qq[0] is xianshi:inst7|qq[0]
--operation mode is arithmetic

D1_qq[0]_lut_out = !D1_qq[0];
D1_qq[0] = DFFEAS(D1_qq[0]_lut_out, clk, VCC, , , , , D1L11, );

--D1L15 is xianshi:inst7|qq[0]~655
--operation mode is arithmetic

D1L15 = CARRY(D1_qq[0]);


--C2L6 is cnt:inst2|reduce_nor~0
--operation mode is normal

C2L6 = !C2_cqi[0] & !C2_cqi[1] & !C2_cqi[2] & !C2_cqi[3];


--C3L6 is cnt:inst3|reduce_nor~0
--operation mode is normal

C3L6 = !C3_cqi[0] & !C3_cqi[1] & !C3_cqi[2] & !C3_cqi[3];


--C4L5 is cnt:inst4|reduce_nor~0
--operation mode is normal

C4L5 = !C4_cqi[0] & !C4_cqi[1] & !C4_cqi[2];


--B1_clk_scan is clkgen:inst|clk_scan
--operation mode is normal

B1_clk_scan_lut_out = B1_cnt[18] # !B1L95 & (B1_cnt[13] # !B1L26);
B1_clk_scan = DFFEAS(B1_clk_scan_lut_out, clk, VCC, , , , , , );


--B1_cnt[14] is clkgen:inst|cnt[14]
--operation mode is normal

B1_cnt[14]_lut_out = B1L1;
B1_cnt[14] = DFFEAS(B1_cnt[14]_lut_out, clk, VCC, , , , , , );


--B1_cnt[17] is clkgen:inst|cnt[17]
--operation mode is normal

B1_cnt[17]_lut_out = B1L3 & (B1L56 # B1L76 # B1L86);
B1_cnt[17] = DFFEAS(B1_cnt[17]_lut_out, clk, VCC, , , , , , );


--B1_cnt[16] is clkgen:inst|cnt[16]
--operation mode is normal

B1_cnt[16]_lut_out = B1L5 & (B1L56 # B1L76 # B1L86);
B1_cnt[16] = DFFEAS(B1_cnt[16]_lut_out, clk, VCC, , , , , , );


--B1_cnt[15] is clkgen:inst|cnt[15]
--operation mode is normal

B1_cnt[15]_lut_out = B1L7 & (B1L56 # B1L76 # B1L86);
B1_cnt[15] = DFFEAS(B1_cnt[15]_lut_out, clk, VCC, , , , , , );


--B1L95 is clkgen:inst|LessThan~252
--operation mode is normal

B1L95 = !B1_cnt[15] # !B1_cnt[16] # !B1_cnt[17] # !B1_cnt[14];


--B1_cnt[5] is clkgen:inst|cnt[5]
--operation mode is normal

B1_cnt[5]_lut_out = B1L9 & (B1L56 # B1L76 # B1L86);
B1_cnt[5] = DFFEAS(B1_cnt[5]_lut_out, clk, VCC, , , , , , );


--B1_cnt[6] is clkgen:inst|cnt[6]
--operation mode is normal

B1_cnt[6]_lut_out = B1L11;
B1_cnt[6] = DFFEAS(B1_cnt[6]_lut_out, clk, VCC, , , , , , );


--B1_cnt[4] is clkgen:inst|cnt[4]
--operation mode is normal

B1_cnt[4]_lut_out = B1L31;
B1_cnt[4] = DFFEAS(B1_cnt[4]_lut_out, clk, VCC, , , , , , );


--B1_cnt[7] is clkgen:inst|cnt[7]
--operation mode is normal

B1_cnt[7]_lut_out = B1L51;
B1_cnt[7] = DFFEAS(B1_cnt[7]_lut_out, clk, VCC, , , , , , );


--B1L06 is clkgen:inst|LessThan~253
--operation mode is normal

B1L06 = !B1_cnt[5] & !B1_cnt[6] & !B1_cnt[4] # !B1_cnt[7];


--B1_cnt[11] is clkgen:inst|cnt[11]
--operation mode is normal

B1_cnt[11]_lut_out = B1L71;
B1_cnt[11] = DFFEAS(B1_cnt[11]_lut_out, clk, VCC, , , , , , );


--B1_cnt[10] is clkgen:inst|cnt[10]
--operation mode is normal

B1_cnt[10]_lut_out = B1L91;
B1_cnt[10] = DFFEAS(B1_cnt[10]_lut_out, clk, VCC, , , , , , );


--B1_cnt[9] is clkgen:inst|cnt[9]
--operation mode is normal

B1_cnt[9]_lut_out = B1L12;
B1_cnt[9] = DFFEAS(B1_cnt[9]_lut_out, clk, VCC, , , , , , );


--B1L16 is clkgen:inst|LessThan~254
--operation mode is normal

B1L16 = !B1_cnt[11] & !B1_cnt[10] & !B1_cnt[9];


--B1_cnt[8] is clkgen:inst|cnt[8]
--operation mode is normal

B1_cnt[8]_lut_out = B1L32 & (B1L56 # B1L76 # B1L86);
B1_cnt[8] = DFFEAS(B1_cnt[8]_lut_out, clk, VCC, , , , , , );


--B1_cnt[12] is clkgen:inst|cnt[12]
--operation mode is normal

B1_cnt[12]_lut_out = B1L52;
B1_cnt[12] = DFFEAS(B1_cnt[12]_lut_out, clk, VCC, , , , , , );


--B1L26 is clkgen:inst|LessThan~255
--operation mode is normal

B1L26 = B1L06 & B1L16 & !B1_cnt[8] # !B1_cnt[12];


--B1_cnt[13] is clkgen:inst|cnt[13]
--operation mode is normal

B1_cnt[13]_lut_out = B1L72 & (B1L56 # B1L76 # B1L86);
B1_cnt[13] = DFFEAS(B1_cnt[13]_lut_out, clk, VCC, , , , , , );


--B1_cnt[18] is clkgen:inst|cnt[18]
--operation mode is normal

B1_cnt[18]_lut_out = B1L92 & (B1L56 # B1L76 # B1L86);
B1_cnt[18] = DFFEAS(B1_cnt[18]_lut_out, clk, VCC, , , , , , );


--B1L1 is clkgen:inst|add~286
--operation mode is arithmetic

B1L1_carry_eqn = B1L82;
B1L1 = B1_cnt[14] $ (!B1L1_carry_eqn);

--B1L2 is clkgen:inst|add~288
--operation mode is arithmetic

B1L2 = CARRY(B1_cnt[14] & (!B1L82));


--B1L3 is clkgen:inst|add~291
--operation mode is arithmetic

B1L3_carry_eqn = B1L6;
B1L3 = B1_cnt[17] $ (B1L3_carry_eqn);

--B1L4 is clkgen:inst|add~293
--operation mode is arithmetic

B1L4 = CARRY(!B1L6 # !B1_cnt[17]);


--B1L46 is clkgen:inst|reduce_nor~116
--operation mode is normal

B1L46 = B1_cnt[17] & B1_cnt[16] & B1_cnt[15];


--B1L56 is clkgen:inst|reduce_nor~117
--operation mode is normal

B1L56 = B1_cnt[14] # !B1L46 # !B1L16 # !B1_cnt[18];


--B1_cnt[3] is clkgen:inst|cnt[3]
--operation mode is normal

B1_cnt[3]_lut_out = B1L03;
B1_cnt[3] = DFFEAS(B1_cnt[3]_lut_out, clk, VCC, , , , , , );


--B1L66 is clkgen:inst|reduce_nor~118
--operation mode is normal

B1L66 = B1_cnt[7] # B1_cnt[3] # !B1_cnt[8] # !B1_cnt[5];


--B1L36 is clkgen:inst|LessThan~257
--operation mode is normal

B1L36 = !B1_cnt[6] & !B1_cnt[4];


--B1L76 is clkgen:inst|reduce_nor~119
--operation mode is normal

B1L76 = B1_cnt[12] # B1L66 # !B1L36 # !B1_cnt[13];


--B1_cnt[2] is clkgen:inst|cnt[2]
--operation mode is normal

B1_cnt[2]_lut_out = B1L23;
B1_cnt[2] = DFFEAS(B1_cnt[2]_lut_out, clk, VCC, , , , , , );


--B1_cnt[1] is clkgen:inst|cnt[1]
--operation mode is normal

B1_cnt[1]_lut_out = B1L43;
B1_cnt[1] = DFFEAS(B1_cnt[1]_lut_out, clk, VCC, , , , , , );


--B1_cnt[0] is clkgen:inst|cnt[0]
--operation mode is normal

B1_cnt[0]_lut_out = B1L63 & (B1L56 # B1L76 # B1L86);
B1_cnt[0] = DFFEAS(B1_cnt[0]_lut_out, clk, VCC, , , , , , );


--B1L86 is clkgen:inst|reduce_nor~120
--operation mode is normal

B1L86 = B1_cnt[2] # B1_cnt[1] # B1_cnt[0];


--B1L5 is clkgen:inst|add~296
--operation mode is arithmetic

B1L5_carry_eqn = B1L8;
B1L5 = B1_cnt[16] $ (!B1L5_carry_eqn);

--B1L6 is clkgen:inst|add~298
--operation mode is arithmetic

B1L6 = CARRY(B1_cnt[16] & (!B1L8));


--B1L7 is clkgen:inst|add~301
--operation mode is arithmetic

B1L7_carry_eqn = B1L2;
B1L7 = B1_cnt[15] $ (B1L7_carry_eqn);

--B1L8 is clkgen:inst|add~303
--operation mode is arithmetic

B1L8 = CARRY(!B1L2 # !B1_cnt[15]);


--B1L9 is clkgen:inst|add~306
--operation mode is arithmetic

B1L9_carry_eqn = B1L41;
B1L9 = B1_cnt[5] $ (B1L9_carry_eqn);

--B1L01 is clkgen:inst|add~308
--operation mode is arithmetic

B1L01 = CARRY(!B1L41 # !B1_cnt[5]);


--B1L11 is clkgen:inst|add~311
--operation mode is arithmetic

B1L11_carry_eqn = B1L01;
B1L11 = B1_cnt[6] $ (!B1L11_carry_eqn);

--B1L21 is clkgen:inst|add~313
--operation mode is arithmetic

B1L21 = CARRY(B1_cnt[6] & (!B1L01));


--B1L31 is clkgen:inst|add~316
--operation mode is arithmetic

B1L31_carry_eqn = B1L13;
B1L31 = B1_cnt[4] $ (!B1L31_carry_eqn);

--B1L41 is clkgen:inst|add~318
--operation mode is arithmetic

B1L41 = CARRY(B1_cnt[4] & (!B1L13));


--B1L51 is clkgen:inst|add~321
--operation mode is arithmetic

B1L51_carry_eqn = B1L21;
B1L51 = B1_cnt[7] $ (B1L51_carry_eqn);

--B1L61 is clkgen:inst|add~323
--operation mode is arithmetic

B1L61 = CARRY(!B1L21 # !B1_cnt[7]);


--B1L71 is clkgen:inst|add~326
--operation mode is arithmetic

B1L71_carry_eqn = B1L02;
B1L71 = B1_cnt[11] $ (B1L71_carry_eqn);

--B1L81 is clkgen:inst|add~328
--operation mode is arithmetic

B1L81 = CARRY(!B1L02 # !B1_cnt[11]);


--B1L91 is clkgen:inst|add~331
--operation mode is arithmetic

B1L91_carry_eqn = B1L22;
B1L91 = B1_cnt[10] $ (!B1L91_carry_eqn);

--B1L02 is clkgen:inst|add~333
--operation mode is arithmetic

B1L02 = CARRY(B1_cnt[10] & (!B1L22));


--B1L12 is clkgen:inst|add~336
--operation mode is arithmetic

B1L12_carry_eqn = B1L42;
B1L12 = B1_cnt[9] $ (B1L12_carry_eqn);

--B1L22 is clkgen:inst|add~338
--operation mode is arithmetic

B1L22 = CARRY(!B1L42 # !B1_cnt[9]);


--B1L32 is clkgen:inst|add~341
--operation mode is arithmetic

B1L32_carry_eqn = B1L61;
B1L32 = B1_cnt[8] $ (!B1L32_carry_eqn);

--B1L42 is clkgen:inst|add~343
--operation mode is arithmetic

B1L42 = CARRY(B1_cnt[8] & (!B1L61));


--B1L52 is clkgen:inst|add~346
--operation mode is arithmetic

B1L52_carry_eqn = B1L81;
B1L52 = B1_cnt[12] $ (!B1L52_carry_eqn);

--B1L62 is clkgen:inst|add~348
--operation mode is arithmetic

B1L62 = CARRY(B1_cnt[12] & (!B1L81));


--B1L72 is clkgen:inst|add~351
--operation mode is arithmetic

B1L72_carry_eqn = B1L62;
B1L72 = B1_cnt[13] $ (B1L72_carry_eqn);

--B1L82 is clkgen:inst|add~353
--operation mode is arithmetic

B1L82 = CARRY(!B1L62 # !B1_cnt[13]);


--B1L92 is clkgen:inst|add~356
--operation mode is normal

B1L92_carry_eqn = B1L4;
B1L92 = B1_cnt[18] $ (!B1L92_carry_eqn);


--B1L03 is clkgen:inst|add~361
--operation mode is arithmetic

B1L03_carry_eqn = B1L33;
B1L03 = B1_cnt[3] $ (B1L03_carry_eqn);

--B1L13 is clkgen:inst|add~363
--operation mode is arithmetic

B1L13 = CARRY(!B1L33 # !B1_cnt[3]);


--B1L23 is clkgen:inst|add~366
--operation mode is arithmetic

B1L23_carry_eqn = B1L53;
B1L23 = B1_cnt[2] $ (!B1L23_carry_eqn);

--B1L33 is clkgen:inst|add~368
--operation mode is arithmetic

B1L33 = CARRY(B1_cnt[2] & (!B1L53));


--B1L43 is clkgen:inst|add~371
--operation mode is arithmetic

B1L43_carry_eqn = B1L73;
B1L43 = B1_cnt[1] $ (B1L43_carry_eqn);

--B1L53 is clkgen:inst|add~373
--operation mode is arithmetic

B1L53 = CARRY(!B1L73 # !B1_cnt[1]);


--B1L63 is clkgen:inst|add~376
--operation mode is arithmetic

B1L63 = !B1_cnt[0];

--B1L73 is clkgen:inst|add~378
--operation mode is arithmetic

B1L73 = CARRY(B1_cnt[0]);


--D1L21 is xianshi:inst7|dout[0]~635
--operation mode is normal

D1L21 = D1_qq[1] & D1_qq[2] & D1L63 & D1L73;


--D1L31 is xianshi:inst7|dout[0]~636
--operation mode is normal

D1L31 = D1L6 # !D1_qq[17] & (D1L23 # !D1_qq[16]);


--D1L84 is xianshi:inst7|LessThan~1727
--operation mode is normal

D1L84 = D1_qq[11] & D1_qq[12] & (D1L52 # D1_qq[9]);


--D1L52 is xianshi:inst7|LessThan~1687
--operation mode is normal

D1L52 = D1_qq[10] # D1L62 & D1_qq[8] & D1_qq[7];


--D1L62 is xianshi:inst7|LessThan~1690
--operation mode is normal

D1L62 = D1_qq[6] # D1_qq[5] # D1_qq[3] & D1_qq[4];


--clk is clk
--operation mode is input

clk = INPUT();


--clr is clr
--operation mode is input

clr = INPUT();


--ena is ena
--operation mode is input

ena = INPUT();


--seg[6] is seg[6]
--operation mode is output

seg[6] = OUTPUT(E1L7);


--seg[5] is seg[5]
--operation mode is output

seg[5] = OUTPUT(!E1L6);


--seg[4] is seg[4]
--operation mode is output

seg[4] = OUTPUT(!E1L5);


--seg[3] is seg[3]
--operation mode is output

seg[3] = OUTPUT(!E1L4);


--seg[2] is seg[2]
--operation mode is output

seg[2] = OUTPUT(!E1L3);


--seg[1] is seg[1]
--operation mode is output

seg[1] = OUTPUT(!E1L2);


--seg[0] is seg[0]
--operation mode is output

seg[0] = OUTPUT(!E1L1);


--sel[2] is sel[2]
--operation mode is output

sel[2] = OUTPUT(D1_w1[2]);


--sel[1] is sel[1]
--operation mode is output

sel[1] = OUTPUT(D1_w1[1]);


--sel[0] is sel[0]
--operation mode is output

sel[0] = OUTPUT(D1_w1[0]);