readme.txt

来自「SDRAM的控制器的VHDL语言编写代码」· 文本 代码 · 共 15 行

To operate the test bench for the Micron SDRAM VHDL model, follow the directions
given below:

1. Be sure all supporting files for the SDRAM are compiled into your library:
   
      util1164.vhd
      stdlogar.vhd
      io_utils.vhd
      mti_pkg.vhd

2. Next, compile the mt48lc1m16a1.vhd file and the test.vhd file.

3. Simulate the "tb" architecture. This is the testbench for the SDRAM.