fir.map.eqn

VHDL设计FIR滤波器 基于QUARTUS和MATLAB

F1L61Q_carry_eqn = F1L51;
F1L61Q_lut_out = D2L31Q $ !F1L61Q_carry_eqn;
F1L61Q_sload_eqn = (D2L71Q & F1L53) # (!D2L71Q & F1L61Q_lut_out);
F1L61Q = DFFEA(F1L61Q_sload_eqn, clk, VCC, , , , );

--F1L71 is mult18:inst27|Dout[9]~reg0COUT
--operation mode is arithmetic

F1L71 = CARRY(D2L31Q & !F1L51);


--F1L81Q is mult18:inst27|Dout[10]~reg0
--operation mode is arithmetic

F1L81Q_carry_eqn = F1L71;
F1L81Q_lut_out = D2L51Q $ F1L81Q_carry_eqn;
F1L81Q_sload_eqn = (D2L71Q & F1L73) # (!D2L71Q & F1L81Q_lut_out);
F1L81Q = DFFEA(F1L81Q_sload_eqn, clk, VCC, , , , );

--F1L91 is mult18:inst27|Dout[10]~reg0COUT
--operation mode is arithmetic

F1L91 = CARRY(!F1L71 # !D2L51Q);


--F1L02Q is mult18:inst27|Dout[11]~reg0
--operation mode is arithmetic

F1L02Q_carry_eqn = F1L91;
F1L02Q_lut_out = D2L71Q $ !F1L02Q_carry_eqn;
F1L02Q_sload_eqn = (D2L71Q & F1L93) # (!D2L71Q & F1L02Q_lut_out);
F1L02Q = DFFEA(F1L02Q_sload_eqn, clk, VCC, , , , );

--F1L12 is mult18:inst27|Dout[11]~reg0COUT
--operation mode is arithmetic

F1L12 = CARRY(D2L71Q & !F1L91);


--F1L22Q is mult18:inst27|Dout[12]~reg0
--operation mode is normal

F1L22Q_carry_eqn = F1L12;
F1L22Q_lut_out = F1L22Q_carry_eqn;
F1L22Q_sload_eqn = (D2L71Q & F1L14) # (!D2L71Q & F1L22Q_lut_out);
F1L22Q = DFFEA(F1L22Q_sload_eqn, clk, VCC, , , , );


--F1L32 is mult18:inst27|i~6
--operation mode is arithmetic

F1L32 = D2L1Q $ D2L7Q;

--F1L42 is mult18:inst27|i~6COUT
--operation mode is arithmetic

F1L42 = CARRY(D2L1Q & D2L7Q);


--F1L52 is mult18:inst27|i~7
--operation mode is arithmetic

F1L52_carry_eqn = F1L42;
F1L52 = D2L3Q $ D2L9Q $ F1L52_carry_eqn;

--F1L62 is mult18:inst27|i~7COUT
--operation mode is arithmetic

F1L62 = CARRY(D2L3Q & !D2L9Q & !F1L42 # !D2L3Q & (!F1L42 # !D2L9Q));


--F1L72 is mult18:inst27|i~8
--operation mode is arithmetic

F1L72_carry_eqn = F1L62;
F1L72 = D2L5Q $ D2L11Q $ !F1L72_carry_eqn;

--F1L82 is mult18:inst27|i~8COUT
--operation mode is arithmetic

F1L82 = CARRY(D2L5Q & (D2L11Q # !F1L62) # !D2L5Q & D2L11Q & !F1L62);


--F1L92 is mult18:inst27|i~9
--operation mode is arithmetic

F1L92_carry_eqn = F1L82;
F1L92 = D2L7Q $ D2L31Q $ F1L92_carry_eqn;

--F1L03 is mult18:inst27|i~9COUT
--operation mode is arithmetic

F1L03 = CARRY(D2L7Q & !D2L31Q & !F1L82 # !D2L7Q & (!F1L82 # !D2L31Q));


--F1L13 is mult18:inst27|i~10
--operation mode is arithmetic

F1L13_carry_eqn = F1L03;
F1L13 = D2L9Q $ D2L51Q $ !F1L13_carry_eqn;

--F1L23 is mult18:inst27|i~10COUT
--operation mode is arithmetic

F1L23 = CARRY(D2L9Q & (D2L51Q # !F1L03) # !D2L9Q & D2L51Q & !F1L03);


--F1L33 is mult18:inst27|i~11
--operation mode is arithmetic

F1L33_carry_eqn = F1L23;
F1L33 = D2L71Q $ D2L11Q $ F1L33_carry_eqn;

--F1L43 is mult18:inst27|i~11COUT
--operation mode is arithmetic

F1L43 = CARRY(D2L71Q & !D2L11Q & !F1L23 # !D2L71Q & (!F1L23 # !D2L11Q));


--F1L53 is mult18:inst27|i~12
--operation mode is arithmetic

F1L53_carry_eqn = F1L43;
F1L53 = D2L31Q $ F1L53_carry_eqn;

--F1L63 is mult18:inst27|i~12COUT
--operation mode is arithmetic

F1L63 = CARRY(D2L31Q # !F1L43);


--F1L73 is mult18:inst27|i~13
--operation mode is arithmetic

F1L73_carry_eqn = F1L63;
F1L73 = D2L51Q $ !F1L73_carry_eqn;

--F1L83 is mult18:inst27|i~13COUT
--operation mode is arithmetic

F1L83 = CARRY(!D2L51Q & !F1L63);


--F1L93 is mult18:inst27|i~14
--operation mode is arithmetic

F1L93_carry_eqn = F1L83;
F1L93 = D2L71Q $ F1L93_carry_eqn;

--F1L04 is mult18:inst27|i~14COUT
--operation mode is arithmetic

F1L04 = CARRY(D2L71Q # !F1L83);


--F1L14 is mult18:inst27|i~15
--operation mode is normal

F1L14_carry_eqn = F1L04;
F1L14 = F1L14_carry_eqn;


--B1L2Q is add121313:inst|Dout[1]~reg0
--operation mode is arithmetic

B1L2Q_lut_out = F1L2Q $ E1L1Q;
B1L2Q = DFFEA(B1L2Q_lut_out, clk, VCC, , , , );

--B1L3 is add121313:inst|Dout[1]~reg0COUT
--operation mode is arithmetic

B1L3 = CARRY(F1L2Q & E1L1Q);


--B1L4Q is add121313:inst|Dout[2]~reg0
--operation mode is arithmetic

B1L4Q_carry_eqn = B1L3;
B1L4Q_lut_out = F1L3Q $ E1L2Q $ B1L4Q_carry_eqn;
B1L4Q = DFFEA(B1L4Q_lut_out, clk, VCC, , , , );

--B1L5 is add121313:inst|Dout[2]~reg0COUT
--operation mode is arithmetic

B1L5 = CARRY(F1L3Q & !E1L2Q & !B1L3 # !F1L3Q & (!B1L3 # !E1L2Q));


--B1L6Q is add121313:inst|Dout[3]~reg0
--operation mode is arithmetic

B1L6Q_carry_eqn = B1L5;
B1L6Q_lut_out = F1L4Q $ E1L4Q $ !B1L6Q_carry_eqn;
B1L6Q = DFFEA(B1L6Q_lut_out, clk, VCC, , , , );

--B1L7 is add121313:inst|Dout[3]~reg0COUT
--operation mode is arithmetic

B1L7 = CARRY(F1L4Q & (E1L4Q # !B1L5) # !F1L4Q & E1L4Q & !B1L5);


--B1L8Q is add121313:inst|Dout[4]~reg0
--operation mode is arithmetic

B1L8Q_carry_eqn = B1L7;
B1L8Q_lut_out = F1L6Q $ E1L6Q $ B1L8Q_carry_eqn;
B1L8Q = DFFEA(B1L8Q_lut_out, clk, VCC, , , , );

--B1L9 is add121313:inst|Dout[4]~reg0COUT
--operation mode is arithmetic

B1L9 = CARRY(F1L6Q & !E1L6Q & !B1L7 # !F1L6Q & (!B1L7 # !E1L6Q));


--B1L01Q is add121313:inst|Dout[5]~reg0
--operation mode is arithmetic

B1L01Q_carry_eqn = B1L9;
B1L01Q_lut_out = F1L8Q $ E1L8Q $ !B1L01Q_carry_eqn;
B1L01Q = DFFEA(B1L01Q_lut_out, clk, VCC, , , , );

--B1L11 is add121313:inst|Dout[5]~reg0COUT
--operation mode is arithmetic

B1L11 = CARRY(F1L8Q & (E1L8Q # !B1L9) # !F1L8Q & E1L8Q & !B1L9);


--B1L21Q is add121313:inst|Dout[6]~reg0
--operation mode is arithmetic

B1L21Q_carry_eqn = B1L11;
B1L21Q_lut_out = F1L01Q $ E1L01Q $ B1L21Q_carry_eqn;
B1L21Q = DFFEA(B1L21Q_lut_out, clk, VCC, , , , );

--B1L31 is add121313:inst|Dout[6]~reg0COUT
--operation mode is arithmetic

B1L31 = CARRY(F1L01Q & !E1L01Q & !B1L11 # !F1L01Q & (!B1L11 # !E1L01Q));


--B1L41Q is add121313:inst|Dout[7]~reg0
--operation mode is arithmetic

B1L41Q_carry_eqn = B1L31;
B1L41Q_lut_out = F1L21Q $ E1L21Q $ !B1L41Q_carry_eqn;
B1L41Q = DFFEA(B1L41Q_lut_out, clk, VCC, , , , );

--B1L51 is add121313:inst|Dout[7]~reg0COUT
--operation mode is arithmetic

B1L51 = CARRY(F1L21Q & (E1L21Q # !B1L31) # !F1L21Q & E1L21Q & !B1L31);


--B1L61Q is add121313:inst|Dout[8]~reg0
--operation mode is arithmetic

B1L61Q_carry_eqn = B1L51;
B1L61Q_lut_out = F1L41Q $ E1L41Q $ B1L61Q_carry_eqn;
B1L61Q = DFFEA(B1L61Q_lut_out, clk, VCC, , , , );

--B1L71 is add121313:inst|Dout[8]~reg0COUT
--operation mode is arithmetic

B1L71 = CARRY(F1L41Q & !E1L41Q & !B1L51 # !F1L41Q & (!B1L51 # !E1L41Q));


--B1L81Q is add121313:inst|Dout[9]~reg0
--operation mode is arithmetic

B1L81Q_carry_eqn = B1L71;
B1L81Q_lut_out = F1L61Q $ E1L61Q $ !B1L81Q_carry_eqn;
B1L81Q = DFFEA(B1L81Q_lut_out, clk, VCC, , , , );

--B1L91 is add121313:inst|Dout[9]~reg0COUT
--operation mode is arithmetic

B1L91 = CARRY(F1L61Q & (E1L61Q # !B1L71) # !F1L61Q & E1L61Q & !B1L71);


--B1L02Q is add121313:inst|Dout[10]~reg0
--operation mode is arithmetic

B1L02Q_carry_eqn = B1L91;
B1L02Q_lut_out = F1L81Q $ E1L81Q $ B1L02Q_carry_eqn;
B1L02Q = DFFEA(B1L02Q_lut_out, clk, VCC, , , , );

--B1L12 is add121313:inst|Dout[10]~reg0COUT
--operation mode is arithmetic

B1L12 = CARRY(F1L81Q & !E1L81Q & !B1L91 # !F1L81Q & (!B1L91 # !E1L81Q));


--B1L22Q is add121313:inst|Dout[11]~reg0
--operation mode is arithmetic

B1L22Q_carry_eqn = B1L12;
B1L22Q_lut_out = F1L02Q $ E1L02Q $ !B1L22Q_carry_eqn;
B1L22Q = DFFEA(B1L22Q_lut_out, clk, VCC, , , , );

--B1L32 is add121313:inst|Dout[11]~reg0COUT
--operation mode is arithmetic

B1L32 = CARRY(F1L02Q & (E1L02Q # !B1L12) # !F1L02Q & E1L02Q & !B1L12);


--B1L42Q is add121313:inst|Dout[12]~reg0
--operation mode is normal

B1L42Q_carry_eqn = B1L32;
B1L42Q_lut_out = F1L22Q $ E1L02Q $ B1L42Q_carry_eqn;
B1L42Q = DFFEA(B1L42Q_lut_out, clk, VCC, , , , );


--Q1L1Q is sub131314:inst37|Dout[0]~reg0
--operation mode is arithmetic

Q1L1Q_lut_out = B2L1Q $ B1L1Q;
Q1L1Q = DFFEA(Q1L1Q_lut_out, clk, VCC, , , , );

--Q1L2 is sub131314:inst37|Dout[0]~reg0COUT
--operation mode is arithmetic

Q1L2 = CARRY(B2L1Q # !B1L1Q);


--Q1L3Q is sub131314:inst37|Dout[1]~reg0
--operation mode is arithmetic

Q1L3Q_carry_eqn = Q1L2;
Q1L3Q_lut_out = B2L3Q $ B1L2Q $ !Q1L3Q_carry_eqn;
Q1L3Q = DFFEA(Q1L3Q_lut_out, clk, VCC, , , , );

--Q1L4 is sub131314:inst37|Dout[1]~reg0COUT
--operation mode is arithmetic

Q1L4 = CARRY(B2L3Q & B1L2Q & !Q1L2 # !B2L3Q & (B1L2Q # !Q1L2));


--Q1L5Q is sub131314:inst37|Dout[2]~reg0
--operation mode is arithmetic

Q1L5Q_carry_eqn = Q1L4;
Q1L5Q_lut_out = B2L5Q $ B1L4Q $ Q1L5Q_carry_eqn;
Q1L5Q = DFFEA(Q1L5Q_lut_out, clk, VCC, , , , );

--Q1L6 is sub131314:inst37|Dout[2]~reg0COUT
--operation mode is arithmetic

Q1L6 = CARRY(B2L5Q & (!Q1L4 # !B1L4Q) # !B2L5Q & !B1L4Q & !Q1L4);


--Q1L7Q is sub131314:inst37|Dout[3]~reg0
--operation mode is arithmetic

Q1L7Q_carry_eqn = Q1L6;
Q1L7Q_lut_out = B2L7Q $ B1L6Q $ !Q1L7Q_carry_eqn;
Q1L7Q = DFFEA(Q1L7Q_lut_out, clk, VCC, , , , );

--Q1L8 is sub131314:inst37|Dout[3]~reg0COUT
--operation mode is arithmetic

Q1L8 = CARRY(B2L7Q & B1L6Q & !Q1L6 # !B2L7Q & (B1L6Q # !Q1L6));


--Q1L9Q is sub131314:inst37|Dout[4]~reg0
--operation mode is arithmetic

Q1L9Q_carry_eqn = Q1L8;
Q1L9Q_lut_out = B2L9Q $ B1L8Q $ Q1L9Q_carry_eqn;
Q1L9Q = DFFEA(Q1L9Q_lut_out, clk, VCC, , , , );

--Q1L01 is sub131314:inst37|Dout[4]~reg0COUT
--operation mode is arithmetic

Q1L01 = CARRY(B2L9Q & (!Q1L8 # !B1L8Q) # !B2L9Q & !B1L8Q & !Q1L8);


--Q1L11Q is sub131314:inst37|Dout[5]~reg0
--operation mode is arithmetic

Q1L11Q_carry_eqn = Q1L01;
Q1L11Q_lut_out = B2L11Q $ B1L01Q $ !Q1L11Q_carry_eqn;
Q1L11Q = DFFEA(Q1L11Q_lut_out, clk, VCC, , , , );

--Q1L21 is sub131314:inst37|Dout[5]~reg0COUT
--operation mode is arithmetic

Q1L21 = CARRY(B2L11Q & B1L01Q & !Q1L01 # !B2L11Q & (B1L01Q # !Q1L01));


--Q1L31Q is sub131314:inst37|Dout[6]~reg0
--operation mode is arithmetic

Q1L31Q_carry_eqn = Q1L21;
Q1L31Q_lut_out = B2L31Q $ B1L21Q $ Q1L31Q_carry_eqn;
Q1L31Q = DFFEA(Q1L31Q_lut_out, clk, VCC, , , , );

--Q1L41 is sub131314:inst37|Dout[6]~reg0COUT
--operation mode is arithmetic

Q1L41 = CARRY(B2L31Q & (!Q1L21 # !B1L21Q) # !B2L31Q & !B1L21Q & !Q1L21);


--Q1L51Q is sub131314:inst37|Dout[7]~reg0
--operation mode is arithmetic

Q1L51Q_carry_eqn = Q1L41;
Q1L51Q_lut_out = B2L51Q $ B1L41Q $ !Q1L51Q_carry_eqn;
Q1L51Q = DFFEA(Q1L51Q_lut_out, clk, VCC, , , , );

--Q1L61 is sub131314:inst37|Dout[7]~reg0COUT
--operation mode is arithmetic

Q1L61 = CARRY(B2L51Q & B1L41Q & !Q1L41 # !B2L51Q & (B1L41Q # !Q1L41));


--Q1L71Q is sub131314:inst37|Dout[8]~reg0
--operation mode is arithmetic

Q1L71Q_carry_eqn = Q1L61;
Q1L71Q_lut_out = B2L71Q $ B1L61Q $ Q1L71Q_carry_eqn;
Q1L71Q = DFFEA(Q1L71Q_lut_out, clk, VCC, , , , );

--Q1L81 is sub131314:inst37|Dout[8]~reg0COUT
--operation mode is arithmetic

Q1L81 = CARRY(B2L71Q & (!Q1L61 # !B1L61Q) # !B2L71Q & !B1L61Q & !Q1L61);


--Q1L91Q is sub131314:inst37|Dout[9]~reg0
--operation mode is arithmetic

Q1L91Q_carry_eqn = Q1L81;
Q1L91Q_lut_out = B2L91Q $ B1L81Q $ !Q1L91Q_carry_eqn;
Q1L91Q = DFFEA(Q1L91Q_lut_out, clk, VCC, , , , );

--Q1L02 is sub131314:inst37|Dout[9]~reg0COUT
--operation mode is arithmetic

Q1L02 = CARRY(B2L91Q & B1L81Q & !Q1L81 # !B2L91Q & (B1L81Q # !Q1L81));


--Q1L12Q is sub131314:inst37|Dout[10]~reg0
--operation mode is arithmetic

Q1L12Q_carry_eqn = Q1L02;
Q1L12Q_lut_out = B2L12Q $ B1L02Q $ Q1L12Q_carry_eqn;
Q1L12Q = DFFEA(Q1L12Q_lut_out, clk, VCC, , , , );

--Q1L22 is sub131314:inst37|Dout[10]~reg0COUT
--operation mode is arithmetic

Q1L22 = CARRY(B2L12Q & (!Q1L02 # !B1L02Q) # !B2L12Q & !B1L02Q & !Q1L02);


--Q1L32Q is sub131314:inst37|Dout[11]~reg0
--operation mode is arithmetic

Q1L32Q_carry_eqn = Q1L22;
Q1L32Q_lut_out = B2L32Q $ B1L22Q $ !Q1L32Q_carry_eqn;
Q1L32Q = DFFEA(Q1L32Q_lut_out, clk, VCC, , , , );

--Q1L42 is sub131314:inst37|Dout[11]~reg0COUT
--operation mode is arithmetic

Q1L42 = CARRY(B2L32Q & B1L22Q & !Q1L22 # !B2L32Q & (B1L22Q # !Q1L22));


--Q1L52Q is sub131314:inst37|Dout[12]~reg0
--operation mode is arithmetic

Q1L52Q_carry_eqn = Q1L42;
Q1L52Q_lut_out = B2L52Q $ B1L42Q $ Q1L52Q_carry_eqn;
Q1L52Q = DFFEA(Q1L52Q_lut_out, clk, VCC, , , , );

--Q1L62 is sub131314:inst37|Dout[12]~reg0COUT
--operation mode is arithmetic

Q1L62 = CARRY(B2L52Q & (!Q1L42 # !B1L42Q) # !B2L52Q & !B1L42Q & !Q1L42);


--Q1L72Q is sub131314:inst37|Dout[13]~reg0
--operation mode is normal

Q1L72Q_carry_eqn = Q1L62;
Q1L72Q_lut_out = B2L52Q $ B1L42Q $ !Q1L72Q_carry_eqn;
Q1L72Q = DFFEA(Q1L72Q_lut_out, clk, VCC, , , , );


--S1L1 is add141616:inst39|Dout[8]~0
--operation mode is arithmetic

S1L1 = CARRY(R1L1Q & Q1L1Q);


--S1L2 is add141616:inst39|Dout[8]~1
--operation mode is arithmetic

S1L2 = CARRY(R1L3Q & !Q1L3Q & !S1L1 # !R1L3Q & (!S1L1 # !Q1L3Q));


--S1L3 is add141616:inst39|Dout[8]~2
--operation mode is arithmetic

S1L3 = CARRY(R1L5Q & (Q1L5Q #