decoder2_4.sim.rpt

数字系统设计中的全加器、10进制计数器、2-4译码器、摩尔状态机、2-1路选择器的源代码

; |decoder2_4|Q[1]                                                 ; |decoder2_4|Q[1]                                                 ; pin_out          ;
; |decoder2_4|Q[2]                                                 ; |decoder2_4|Q[2]                                                 ; pin_out          ;
; |decoder2_4|Q[3]                                                 ; |decoder2_4|Q[3]                                                 ; pin_out          ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~0              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~0              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~1              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~1              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|result_node[0]~0 ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|result_node[0]~0 ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~2              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~2              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|result_node[0]~1 ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|result_node[0]~1 ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|result_node[0]   ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|result_node[0]   ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~4              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~4              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~6              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~6              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|w_result19w~1    ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|w_result19w~1    ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|w_result19w      ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|w_result19w      ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~1              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~1              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~2              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~2              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|result_node[0]~1 ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|result_node[0]~1 ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|result_node[0]   ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|result_node[0]   ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~4              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~4              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~5              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~5              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~6              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~6              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|w_result19w~0    ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|w_result19w~0    ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|w_result19w~1    ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|w_result19w~1    ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|w_result19w      ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|w_result19w      ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~0              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~0              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~1              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~1              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|result_node[0]~0 ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|result_node[0]~0 ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~2              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~2              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|result_node[0]~1 ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|result_node[0]~1 ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|result_node[0]   ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|result_node[0]   ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~4              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~4              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~5              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~5              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~6              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~6              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|w_result19w~0    ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|w_result19w~0    ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~7              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~7              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|w_result19w~1    ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|w_result19w~1    ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|w_result19w      ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|w_result19w      ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~0              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~0              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~1              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~1              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|result_node[0]~0 ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|result_node[0]~0 ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~2              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~2              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~3              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~3              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|result_node[0]~1 ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|result_node[0]~1 ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|result_node[0]   ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|result_node[0]   ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~4              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~4              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~5              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~5              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~6              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~6              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|w_result19w~0    ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|w_result19w~0    ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|w_result19w~1    ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|w_result19w~1    ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|w_result19w      ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|w_result19w      ; out0             ;
+------------------------------------------------------------------+------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                               ;
+------------------------------------------------------------------+------------------------------------------------------------------+------------------+
; Node Name                                                        ; Output Port Name                                                 ; Output Port Type ;
+------------------------------------------------------------------+------------------------------------------------------------------+------------------+
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~3              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~3              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~5              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~5              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|w_result19w~0    ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|w_result19w~0    ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~7              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~7              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~0              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~0              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|result_node[0]~0 ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|result_node[0]~0 ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~3              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~3              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~7              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~7              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~3              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~3              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~7              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~7              ; out0             ;
+------------------------------------------------------------------+------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                                                                               ;
+------------------------------------------------------------------+------------------------------------------------------------------+------------------+
; Node Name                                                        ; Output Port Name                                                 ; Output Port Type ;
+------------------------------------------------------------------+------------------------------------------------------------------+------------------+
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~3              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~3              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~5              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~5              ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|w_result19w~0    ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|w_result19w~0    ; out0             ;
; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~7              ; |decoder2_4|lpm_mux:Mux3|mux_gdc:auto_generated|_~7              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~0              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~0              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|result_node[0]~0 ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|result_node[0]~0 ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~3              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~3              ; out0             ;
; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~7              ; |decoder2_4|lpm_mux:Mux2|mux_gdc:auto_generated|_~7              ; out0             ;
; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~3              ; |decoder2_4|lpm_mux:Mux1|mux_gdc:auto_generated|_~3              ; out0             ;
; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~7              ; |decoder2_4|lpm_mux:Mux0|mux_gdc:auto_generated|_~7              ; out0             ;
+------------------------------------------------------------------+------------------------------------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Thu Apr 03 23:48:10 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off decoder2_4 -c decoder2_4
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      85.07 %
Info: Number of transitions in simulation is 10070
Info: Vector file decoder2_4.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Processing ended: Thu Apr 03 23:48:11 2008
    Info: Elapsed time: 00:00:02