mux2to1.map.summary

来自「数字系统设计中的全加器、10进制计数器、2-4译码器、摩尔状态机、2-1路选择器」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Wed Mar 26 16:35:43 2008
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : mux2to1
Top-level Entity Name : Block1
Family : Cyclone II
Total logic elements : 4
Total registers : 3
Total pins : 6
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0