idct.map.rpt

8x8 iDCT verilog code 一次輸入八個點

Analysis & Synthesis report for IDCT
Sun Jun 15 20:07:48 2008
Quartus II Version 7.1 Build 156 04/30/2007 SJ Full Version


---------------------
; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Source Files Read
  5. Analysis & Synthesis Resource Usage Summary
  6. Analysis & Synthesis Resource Utilization by Entity
  7. General Register Statistics
  8. Multiplexer Restructuring Statistics (Restructuring Performed)
  9. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17
 10. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM0
 11. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM1
 12. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM2
 13. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM3
 14. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM4
 15. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM5
 16. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM6
 17. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM7
 18. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM8
 19. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM9
 20. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM10
 21. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM11
 22. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM12
 23. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM13
 24. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM14
 25. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM15
 26. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM16
 27. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM17
 28. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM18
 29. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM19
 30. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM20
 31. Parameter Settings for User Entity Instance: matix_mul_8x8_n17:matix_mul_8x8_n17|B4DM_n17:B4DM21
 32. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19
 33. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM0
 34. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM1
 35. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM2
 36. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM3
 37. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM4
 38. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM5
 39. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM6
 40. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM7
 41. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM8
 42. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM9
 43. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM10
 44. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM11
 45. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM12
 46. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM13
 47. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM14
 48. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM15
 49. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM16
 50. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM17
 51. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM18
 52. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM19
 53. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM20
 54. Parameter Settings for User Entity Instance: matix_mul_8x8_n19:matix_mul_8x8_n19|B4DM_n19:B4DM21
 55. Analysis & Synthesis Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+-------------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                                  ;
+------------------------------------+------------------------------------------+
; Analysis & Synthesis Status        ; Successful - Sun Jun 15 20:07:48 2008    ;
; Quartus II Version                 ; 7.1 Build 156 04/30/2007 SJ Full Version ;
; Revision Name                      ; IDCT                                     ;
; Top-level Entity Name              ; IDCT                                     ;
; Family                             ; Cyclone II                               ;
; Total logic elements               ; 3,129                                    ;
;     Total combinational functions  ; 3,129                                    ;
;     Dedicated logic registers      ; 1,305                                    ;
; Total registers                    ; 1305                                     ;
; Total pins                         ; 467                                      ;
; Total virtual pins                 ; 0                                        ;
; Total memory bits                  ; 0                                        ;
; Embedded Multiplier 9-bit elements ; 0                                        ;
; Total PLLs                         ; 0                                        ;
+------------------------------------+------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                                            ;
+--------------------------------------------------------------------------------+--------------------+--------------------+
; Option                                                                         ; Setting            ; Default Value      ;
+--------------------------------------------------------------------------------+--------------------+--------------------+
; Device                                                                         ; EP2C35F672C6       ;                    ;
; Top-level entity name                                                          ; IDCT               ; IDCT               ;
; Family name                                                                    ; Cyclone II         ; Stratix II         ;
; Restructure Multiplexers                                                       ; Auto               ; Auto               ;
; Create Debugging Nodes for IP Cores                                            ; Off                ; Off                ;
; Preserve fewer node names                                                      ; On                 ; On                 ;
; Disable OpenCore Plus hardware evaluation                                      ; Off                ; Off                ;
; Verilog Version                                                                ; Verilog_2001       ; Verilog_2001       ;
; VHDL Version                                                                   ; VHDL93             ; VHDL93             ;
; State Machine Processing                                                       ; Auto               ; Auto               ;
; Safe State Machine                                                             ; Off                ; Off                ;
; Extract Verilog State Machines                                                 ; On                 ; On                 ;
; Extract VHDL State Machines                                                    ; On                 ; On                 ;
; Ignore Verilog initial constructs                                              ; Off                ; Off                ;
; Add Pass-Through Logic to Inferred RAMs                                        ; On                 ; On                 ;
; DSP Block Balancing                                                            ; Auto               ; Auto               ;
; NOT Gate Push-Back                                                             ; On                 ; On                 ;
; Power-Up Don't Care                                                            ; On                 ; On                 ;
; Remove Redundant Logic Cells                                                   ; Off                ; Off                ;
; Remove Duplicate Registers                                                     ; On                 ; On                 ;
; Ignore CARRY Buffers                                                           ; Off                ; Off                ;
; Ignore CASCADE Buffers                                                         ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                                          ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                                      ; Off                ; Off                ;