matix_mul_8x8_n19.v

8x8 iDCT verilog code 一次輸入八個點

module matix_mul_8x8_n19(
	d0,d1,d2,d3,d4,d5,d6,d7,
	y0,y1,y2,y3,y4,y5,y6,y7
	//show_0,show_1,show_2,show_3
	);

	parameter n = 19;
	input [n-1:0]d0,d1,d2,d3,d4,d5,d6,d7;
	
	output [n+1:0]y0,y1,y2,y3,y4,y5,y6,y7;
	//output [n-1:0]show_0,show_1,show_2,show_3;
	
	wire [n+2:0]u0,u1,u2,u3,v0,v1,v2,v3;
	
	parameter a = 4'b1011;
	parameter b = 4'b1111;
	parameter c = 4'b1110;
	parameter d = 4'b1101;
	parameter e = 4'b1000;
	parameter f = 4'b0110;
	parameter g = 4'b0011;
	
	// ------------------
	//assign show_0 = bxd1_r;
	//assign show_1 = dxd3_r;
	//assign show_2 = exd5_r;
	//assign show_3 = gxd7_r;
	// ------------------
	
	// ----------------------- * u0
	
	wire [n-1:0]axd0_r,cxd2_r,axd4_r,fxd6_r;
	
	B4DM_n19 B4DM0(.A(d0),.B(a),.S(axd0_r));
	B4DM_n19 B4DM1(.A(d2),.B(c),.S(cxd2_r));
	B4DM_n19 B4DM2(.A(d4),.B(a),.S(axd4_r));
	B4DM_n19 B4DM3(.A(d6),.B(f),.S(fxd6_r));
	
	assign u0 = {{3{axd0_r[n-1]}},axd0_r} + {{3{cxd2_r[n-1]}},cxd2_r} + {{3{axd4_r[n-1]}},axd4_r} + {{3{fxd6_r[n-1]}},fxd6_r};
	
	// ----------------------- * u1
	
	wire [n-1:0]fxd2_r,cxd6_r;
	
	B4DM_n19 B4DM4(.A(d2),.B(f),.S(fxd2_r));
	B4DM_n19 B4DM5(.A(d6),.B(c),.S(cxd6_r));

	assign u1 = {{3{axd0_r[n-1]}},axd0_r} + {{3{fxd2_r[n-1]}},fxd2_r} - {{3{axd4_r[n-1]}},axd4_r} - {{3{cxd6_r[n-1]}},cxd6_r};
	
	// ----------------------- * u2
	
	assign u2 = {{3{axd0_r[n-1]}},axd0_r} - {{3{fxd2_r[n-1]}},fxd2_r} - {{3{axd4_r[n-1]}},axd4_r} + {{3{cxd6_r[n-1]}},cxd6_r};
	
	// ----------------------- * u3
	
	assign u3 = {{3{axd0_r[n-1]}},axd0_r} - {{3{cxd2_r[n-1]}},cxd2_r} + {{3{axd4_r[n-1]}},axd4_r} - {{3{fxd6_r[n-1]}},fxd6_r};	
	
	// ----------------------- * v0
	
	wire [n-1:0]bxd1_r,dxd3_r,exd5_r,gxd7_r;
	
	B4DM_n19 B4DM6(.A(d1),.B(b),.S(bxd1_r));
	B4DM_n19 B4DM7(.A(d3),.B(d),.S(dxd3_r));
	B4DM_n19 B4DM8(.A(d5),.B(e),.S(exd5_r));
	B4DM_n19 B4DM9(.A(d7),.B(g),.S(gxd7_r));
	
	assign v0 = {{3{bxd1_r[n-1]}},bxd1_r} + {{3{dxd3_r[n-1]}},dxd3_r} + {{3{exd5_r[n-1]}},exd5_r} + {{3{gxd7_r[n-1]}},gxd7_r};
	
	// ----------------------- * v1
	
	wire [n-1:0]dxd1_r,gxd3_r,bxd5_r,exd7_r;
	
	B4DM_n19 B4DM10(.A(d1),.B(d),.S(dxd1_r));
	B4DM_n19 B4DM11(.A(d3),.B(g),.S(gxd3_r));
	B4DM_n19 B4DM12(.A(d5),.B(b),.S(bxd5_r));
	B4DM_n19 B4DM13(.A(d7),.B(e),.S(exd7_r));
	
	assign v1 = {{3{dxd1_r[n-1]}},dxd1_r} - {{3{gxd3_r[n-1]}},gxd3_r} - {{3{bxd5_r[n-1]}},bxd5_r} - {{3{exd7_r[n-1]}},exd7_r};	
		
	// ----------------------- * v2
	
	wire [n-1:0]exd1_r,bxd3_r,gxd5_r,dxd7_r;
	
	B4DM_n19 B4DM14(.A(d1),.B(e),.S(exd1_r));
	B4DM_n19 B4DM15(.A(d3),.B(b),.S(bxd3_r));
	B4DM_n19 B4DM16(.A(d5),.B(g),.S(gxd5_r));
	B4DM_n19 B4DM17(.A(d7),.B(d),.S(dxd7_r));
	
	assign v2 = {{3{exd1_r[n-1]}},exd1_r} - {{3{bxd3_r[n-1]}},bxd3_r} + {{3{gxd5_r[n-1]}},gxd5_r} + {{3{dxd7_r[n-1]}},dxd7_r};	

	// ----------------------- * v3
	
	wire [n-1:0]gxd1_r,exd3_r,dxd5_r,bxd7_r;
	
	B4DM_n19 B4DM18(.A(d1),.B(g),.S(gxd1_r));
	B4DM_n19 B4DM19(.A(d3),.B(e),.S(exd3_r));
	B4DM_n19 B4DM20(.A(d5),.B(d),.S(dxd5_r));
	B4DM_n19 B4DM21(.A(d7),.B(b),.S(bxd7_r));
	
	assign v3 = {{3{gxd1_r[n-1]}},gxd1_r} - {{3{exd3_r[n-1]}},exd3_r} + {{3{dxd5_r[n-1]}},dxd5_r} - {{3{bxd7_r[n-1]}},bxd7_r};		
	
	// -----------------------
	
	assign y0 = ({u0[n+2],u0} + {v0[n+2],v0})>>2;
	assign y1 = ({u1[n+2],u1} + {v1[n+2],v1})>>2;
	assign y2 = ({u2[n+2],u2} + {v2[n+2],v2})>>2;
	assign y3 = ({u3[n+2],u3} + {v3[n+2],v3})>>2;
	assign y4 = ({u3[n+2],u3} - {v3[n+2],v3})>>2;
	assign y5 = ({u2[n+2],u2} - {v2[n+2],v2})>>2;
	assign y6 = ({u1[n+2],u1} - {v1[n+2],v1})>>2;
	assign y7 = ({u0[n+2],u0} - {v0[n+2],v0})>>2;

	
endmodule