dct.tan.summary

8x8DCT verilog code 一次輸入8個點

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 19.103 ns
From           : d6[0]
To             : F[5][6][11]
From Clock     : --
To Clock       : iclk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 23.532 ns
From           : F1_r[0]
To             : m6[14]
From Clock     : iclk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 26.282 ns
From           : d6[0]
To             : F6_S[11]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -3.899 ns
From           : inpull
To             : c0[0]~reg0
From Clock     : --
To Clock       : iclk
Failed Paths   : 0

Type           : Clock Setup: 'iclk'
Slack          : N/A
Required Time  : None
Actual Time    : 193.87 MHz ( period = 5.158 ns )
From           : c1[1]~reg0
To             : F6_r[12]
From Clock     : iclk
To Clock       : iclk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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