cnt24_1.fnsim.qmsg

大量VHDL写的数字系统设计有用实例达到

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version " "Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Mar 12 16:13:12 2007 " "Info: Processing started: Mon Mar 12 16:13:12 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off cnt24_1 -c cnt24_1 --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off cnt24_1 -c cnt24_1 --generate_functional_sim_netlist" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cnt24_1.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file cnt24_1.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 cnt24_1 " "Info: Found entity 1: cnt24_1" {  } { { "cnt24_1.bdf" "" { Schematic "D:/my_eda/cnt24_1/cnt24_1.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "cnt24_1 " "Info: Elaborating entity \"cnt24_1\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/altera60/quartus60/libraries/others/maxplus2/74160.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file e:/altera60/quartus60/libraries/others/maxplus2/74160.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 74160 " "Info: Found entity 1: 74160" {  } { { "74160.bdf" "" { Schematic "e:/altera60/quartus60/libraries/others/maxplus2/74160.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "74160 74160:inst " "Info: Elaborating entity \"74160\" for hierarchy \"74160:inst\"" {  } { { "cnt24_1.bdf" "inst" { Schematic "D:/my_eda/cnt24_1/cnt24_1.bdf" { { 184 176 360 304 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "74160:inst " "Info: Elaborated megafunction instantiation \"74160:inst\"" {  } { { "cnt24_1.bdf" "" { Schematic "D:/my_eda/cnt24_1/cnt24_1.bdf" { { 184 176 360 304 "inst" "" } } } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Functional Simulation Netlist Generation 0 s 0 s Quartus II " "Info: Quartus II Functional Simulation Netlist Generation was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Mar 12 16:13:13 2007 " "Info: Processing ended: Mon Mar 12 16:13:13 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}