prev_cmp_tri_bibuffer.tan.qmsg

大量VHDL写的数字系统设计有用实例达到

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun May 20 15:47:56 2007 " "Info: Processing started: Sun May 20 15:47:56 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off tri_bibuffer -c tri_bibuffer --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off tri_bibuffer -c tri_bibuffer --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "a\[6\] b\[6\] 10.505 ns Longest " "Info: Longest tpd from source pin \"a\[6\]\" to destination pin \"b\[6\]\" is 10.505 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns a\[6\] 1 PIN PIN_71 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_71; Fanout = 1; PIN Node = 'a\[6\]'" {  } { { "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "" { a[6] } "NODE_NAME" } } { "tri_bibuffer.vhd" "" { Text "D:/my_eda/tri_bibuffer/tri_bibuffer.vhd" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.954 ns) 0.954 ns a\[6\]~1 2 COMB IOC_X32_Y0_N1 1 " "Info: 2: + IC(0.000 ns) + CELL(0.954 ns) = 0.954 ns; Loc. = IOC_X32_Y0_N1; Fanout = 1; COMB Node = 'a\[6\]~1'" {  } { { "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "0.954 ns" { a[6] a[6]~1 } "NODE_NAME" } } { "tri_bibuffer.vhd" "" { Text "D:/my_eda/tri_bibuffer/tri_bibuffer.vhd" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(6.325 ns) + CELL(3.226 ns) 10.505 ns b\[6\] 3 PIN PIN_69 0 " "Info: 3: + IC(6.325 ns) + CELL(3.226 ns) = 10.505 ns; Loc. = PIN_69; Fanout = 0; PIN Node = 'b\[6\]'" {  } { { "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "9.551 ns" { a[6]~1 b[6] } "NODE_NAME" } } { "tri_bibuffer.vhd" "" { Text "D:/my_eda/tri_bibuffer/tri_bibuffer.vhd" 4 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.180 ns ( 39.79 % ) " "Info: Total cell delay = 4.180 ns ( 39.79 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.325 ns ( 60.21 % ) " "Info: Total interconnect delay = 6.325 ns ( 60.21 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0}  } { { "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "e:/altera/71/quartus/bin/TimingClosureFloorplan.fld" "" "10.505 ns" { a[6] a[6]~1 b[6] } "NODE_NAME" } } { "e:/altera/71/quartus/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "e:/altera/71/quartus/bin/Technology_Viewer.qrui" "10.505 ns" { a[6] a[6]~1 b[6] } { 0.000ns 0.000ns 6.325ns } { 0.000ns 0.954ns 3.226ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "110 " "Info: Allocated 110 megabytes of memory during processing" {  } {  } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Info" "IQEXE_END_BANNER_TIME" "Sun May 20 15:47:59 2007 " "Info: Processing ended: Sun May 20 15:47:59 2007" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}