comparator_4.hier_info

大量VHDL写的数字系统设计有用实例达到

|comparator_4
a[0] => LessThan0.IN4
a[0] => Equal0.IN3
a[0] => LessThan1.IN4
a[1] => LessThan0.IN3
a[1] => Equal0.IN2
a[1] => LessThan1.IN3
a[2] => LessThan0.IN2
a[2] => Equal0.IN1
a[2] => LessThan1.IN2
a[3] => LessThan0.IN1
a[3] => Equal0.IN0
a[3] => LessThan1.IN1
b[0] => LessThan0.IN8
b[0] => Equal0.IN7
b[0] => LessThan1.IN8
b[1] => LessThan0.IN7
b[1] => Equal0.IN6
b[1] => LessThan1.IN7
b[2] => LessThan0.IN6
b[2] => Equal0.IN5
b[2] => LessThan1.IN6
b[3] => LessThan0.IN5
b[3] => Equal0.IN4
b[3] => LessThan1.IN5
y1 <= y1$latch.DB_MAX_OUTPUT_PORT_TYPE
y2 <= y2$latch.DB_MAX_OUTPUT_PORT_TYPE
y3 <= y3$latch.DB_MAX_OUTPUT_PORT_TYPE